QI am using AD7682 and AD7688 components. I do accesses through a PLD and I am
wondering how using the busy indicator. In the AD7682 datasheet, in the
paragraph "General timing with a busy indicator", it is written: "At the EOC,
if CNV is low, the busy indicator is enabled". As EOC is at the end of tCONV,
and tCONV is equal to 2.2 us max, I thought I had to set CNV high during less
than 2.2 us. But when I do board test, there is a problem, the busy indicator
is not generated. Is there something I misunderstand in the datasheet? Do I
have to set CNV high during more than 2.2 us? With the AD7688, tCONV is defined
with min 0.5 us and max 1.6 us. The sentence in /CS mode 3-wire with busy
indicator is "CNV must be returned low before the minimum conversion time and
heldlow until the maximum conversion time to guarantee the generation of the
busy indicator". With the sentence of this datasheet I understand that I have
to set CNV high during less than 0.5 us and keep it to low until the 1.6 us. Do
I misunderstand the datasheet?
AFirst for the AD7682, to generate a busy indicator on the SDO line, the CNV
signal must be returned low prior to the end of conversion (EOC). The EOC
signal (busy signal) is what we use to determine the conversion time of the
ADC. In busy indicator mode, the busy indicator is generated when a conversion
is complete. The 2.2 uS conversion time that is specified in the data sheet is
a guard banded number that tells you regardless of supply voltage, temperature,
process skew, etc. that the conversion will always be finished within 2.2 uS.
However, the EOC is most likely less than 2.2 uS under normal operating
conditions. Therefore, to enter busy indicator mode, you will most likely need
to bring CNV low well before 2.2 uS has elapsed since a rising edge is observed
on CNV. The guard banded minimum conversion time is actually also specified in
the data sheet and is listed as tDATA. This is the safe data access during
conversion time and is listed as 1.2 uS. This basically says that the part is
still guaranteed to be converting at 1.2 uS after a conversion is initiated.
So in conclusion, on the AD7682, as long as CNV is brought low prior to tDATA,
the device will enter busy indicator mode and will require an SCLK to clear the
busy indicator before data is available.
As for the AD7688, the same basic explanation for busy indicator mode that I
just presented for the AD7682 holds true for this device also. The only
difference will be the specific numbers. Instead of having 1.2 uS to bring CNV
low and still enter busy indicator, the AD7688 only provides the user 500 nS.
For our Automatic Test Equipment programs, we use a CNV high time of only 10 nS
(which is the minimum tCNVH time) for entering busy indicator mode and keep CNV
low for the rest of the conversion period.
Another thing you will want to keep in mind is that you should implement and
pull-up resistor on SDO and you will need to provide the 17th falling edge to
place the SDO pin back in high impedance. If you only use 16 falling edges, SDO
will keep the state of the LSB and could potentially stay driven low.