Document created by analog-archivist Employee on Feb 23, 2016
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Please clarify how the AD1939 decides between Standalone and SPI mode.


As described in the Serial Control Port section on page 14 of the datasheet,
powering up the AD1939 in Stand Alone mode puts the part in default mode with
the exception of the Internal MCLK Enable bit which comes up enabled (Register
0x00 [7]). This would be defined as 256×fs, I2S stereo, MCLK PLL, 32 kHz – 48
kHz fs window. In Stand Alone Mode, there is no SPI control over the AD1939
until the part is reset by power cycling or toggling the reset pin.
The part is put in Stand Alone mode by holding the CIN (pin 30), CCLK (pin 34),
and CLATCH (pin 35) low at powerup. As shown in Table 11, the state of the COUT
(pin 31) at powerup sets the ADC LRCLK and BCLK ports to be either Master
(output) or Slave (input). This does not have any impact on the SPI comm port
that sets the registers for the AD1939.
Table 11 shows the required state of the 4 SPI port pins to put the AD1939 in
either of the two possible Stand Alone modes.
The AD1939 is always and only a SPI Slave. It cannot act as a SPI Master. The
Master and Slave references are to the ADC clocks, as shown in Table 11.
The Automated Register Window Builder is an application that we have written to
control the AD1939 and other codec products within DAU; it is available on the
AD1939 product page under ‘Tools, Software & Sim Models.’ In conjunction with
our USB interface (EVAL-ADUSB2EBZ), Honeywell should be able to see the
conversation between the software and the AD1939.