AD5700/AD5700-1 RXD Activity After HART Carrier Off

Document created by tjohnson Employee on Oct 2, 2015
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Referring to Figure 6, this plot is used to demonstrate “Carrier detect off” time (t5 in Table 3 of the datasheet). This is the time from carrier (i.e. HART signal) off to the CD signal falling edge. The time is 6 bit times max. The RXD signal behavior can be random in that interval, and the software will have to ignore the byte if it is received by UART.


The technical background to this behavior is as follows: The AD5700 has a filter in the CD signal path, to prevent unexpected drops of the CD while in receive mode. The filter is important, otherwise the CD signal could drop for example due to any interference or electromagnetic disturbance event. The filter causes a delay in the carrier detect off, and that delay is defined and specified as 6 bit time max. In this (and only this) defined time period, between the carrier stop and CD falling edge, the receive demodulator still works, and can generate a random signal on RXD output (often known as "dribble byte") by trying to demodulate any noise on the HART input. Note that if the UART interprets that random signal as another received byte, it can indicate a parity error for that byte, because it is a result of a random RXD signal.


This behavior should be easy to overcome in the software. The DLL specification defines the start of the HART message and how to determine the length of the message and position of the check byte as the last byte to be received. Any byte coming after that is undefined and should be ignored. Then even if that byte stays in the UART buffer and software associates it with the start of next message, the software should be able to handle that. At that stage, the software should be looking for two subsequent 0xFF byte preamble bytes followed by a valid  delimiter, and any random byte(s) received before that pattern should be ignored.