Can the AD7175-2 be configured to settle in a single cycle?

Document created by jcolao Employee on Jun 29, 2015
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Yes, setting the SING_CYC bit will allow this. It should be noted that the Sinc5+Sinc1 filter will  settle in a single cycle at output data rates of 10 kSPS and lower regardless of whether the SING_CYC bit is set or not.

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