Is there any L2 cache in ADSP-SC58x?

Document created by Harshit.Gaharwar Employee on Jun 15, 2015
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Apart from Cortex A5’s L1 cache support, L2 Cache Controller (PL-310) is also provided for the Cortex A5 for improved performance to Off-chip memory.

256 KB of L2 cache with parity is available in ADSP-SC58x.