what's new in the SPI peripheral of SC58x processor?

Document created by vinodbableshwar on Jun 12, 2015
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            The SPI peripheral in SC58x will have two distinct modes of operation

    • Legacy: Communication with SPI device facilitated by Tx & Rx FIFOs which are either MMR or DMA accessed
    • Memory Mapped:  New mode where communication to a SPI memory device is automated such that the memory it contains is accessible directly through reads of processor address space.  Once configured, a SPI memory device will behave similar to an L2 ROM, albeit substantially wait stated due to the overhead and limited bandwidth of the SPI interface.