In ADSP-SC58x, can the ARM core access the SHARC+ Core's L1 Memory?

Document created by MaheshN Employee on Jun 9, 2015Last modified by MaheshN Employee on Jun 9, 2015
Version 2Show Document
  • View in full screen mode

Yes, The ARM can access the L1 memory of both the SHARC+ cores in ADSP-SC58x. Both data access and code execution is supported. ARM core can access SHARC+ L1 memory through SHARCs L1 memory multiprocessor addresses alias.

Attachments

    Outcomes