Is there a way to slow down the compute engine of the FFTA on ADSP-SC58x/ADSP-2158x processor?

Document created by Mitesh Employee on Jun 3, 2015
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Yes, FFTCLKRATIO bits in the FFTA0_WCTL register can be used to select the FFTCLK:SYSCLK ratio between 1:1, 1:2, 1:4, and 1:8 modes.

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