nanoDAC+ Family AD531x/AD568x/AD569x/AD567x FAQ

Document created by msamera Employee on Mar 16, 2015Last modified by mbradley on Jul 20, 2015
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Q1. What is new?

A1. The nanoDAC+(TM) family offers improved analog performance in terms of INL and glitch energy specifications.. Some members of the family, those with a part number ending in 'R', for example AD5686R, include a  low drift 2.5V,  2ppm/˚C(typ)/5ppm/˚C(max) internal reference.


Parts have a configurable output span, giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). Depending on the specific device, the gain setting is done using either a digital logic input pin, or by writing a value into a control register.  Certain models have a pin that configures the power-on DAC output value as either zero-scale or mid-scale, which is useful in bipolar applications to give 0V on the output.


Q2. Can the parts be used in an open-loop application?

A2. Yes, there are devices that offer INL accuracy of up to +/-2LSBs, and TUE of up to 0.06% guaranteed from lower codes to full-scale.


Q3. Can the internal reference be disabled?

A3. Yes, it is possible to disable the internal reference if there is a need to drive the part from an external reference. It should be noted that the internal reference is enabled by default at power-up and can be disabled by writing to the reference setup control register.


Q4. Are the parts compatible with 1.8V digital levels?

A4. Yes, if the package offers Vlogic pin it can be connected to a 1.8V supply, and that is used to generate the correct logic thresholds for the digital interface pins.  On those parts that don't have a Vlogic pin, the digital logic thresholds are based on the VDD supply voltage instead.


Q5. What’s determines the power consumption?

A5. The DAC power consumption depends on if the internal reference is disabled or not, or if the power-down mode is used.  For a single DAC with reference, such as the AD5683R, disabling the internal reference can reduce supply current from 350 down to 110uA (typ), and with the power down mode enabled, this can be reduced to 2uA (max).  On a multi-channel DAC such as the 8-ch AD5676R, disabling the internal reference can reduce supply current from 1.8mA down to 1.1mA (typ).  DACs can be powered-down individually, and on the AD5676R, this can reduce current consumption to 2.5uA (max)


Q6. When using an external reference does the gain setting have any effect?

A6. Yes, the external reference input pin impedance depends on the selected gain.  For example, on the AD5683 the gain setting of 1x has an input impedance of 120kOhm, and the  gain setting of 2x has 60kOhm input impedance.


Q7. Can the DAC output be used to drive high capacitance loads?

A7. Yes, but this requires a shunt resistor to guarantee output buffer stability.


Q8. Can devices with a SPI interface be used in a daisy-chain?

A8. Yes, if the device has an SDO pin then it is possible to connect the SDO of one device to the SDI of the next device, forming a SPI daisy chain.  It is also necessary to enable daisy chain mode by setting the DCEN bit in the daisy chain control register.


Q9. Do I need the LDAC/ pin to update the DAC register?

A9. No, there are several ways in which you update the DAC registers without needing to bring the LDAC/ pin low.   There are commands that can be used to write to individual DAC input registers, followed by a 'software LDAC' command to update one or more of the DAC channels.  This allows multiple channels to be written at different times, but all the outputs update at the same time. 

These commands can be useful if you want to reduce the number of digital control signals going to the DAC, However, using this approach instead of the hardware LDAC/ signal reduces the maximum update rate of the DAC outputs. As the software LDAC is an I2C or SPI transaction written to the part, this will take much longer than using the hardware pin to trigger the output update.


Q10. Why does the upper end of the DAC output appear to be limited or non-linear?

A10.  When determining the required VDD supply for the DAC it is important to ensure that VDD is sufficient to power the output amplifier to support the desired output voltage range based on the reference voltage and gain being used.  For example, if a 2.5V reference is used with a gain of 1x, then a 3.3V VDD supply is sufficient.  However, if a gain of 2x is used with the same reference, a VDD supply of 5V is required to support the full output range of the DAC.

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