AD9144 - Does the AD9144 support deterministic latency/multi-chip synchronization?

Document created by MicheleV Employee on Nov 10, 2014
Version 1Show Document
  • View in full screen mode

Yes, the AD9144 supports JESD204B Subclass 0 and Subclass 1 operations for deterministic latency.  Subclass 1 provides synchronization to within ½ a DAC clock period and requires a SYSREF± signal to achieve this latency variation.