Can I take a >256K sample FFT with AD9625 using HSC-ADC-EVALEZ?

Document created by IanB Employee on Oct 6, 2014Last modified by IanB Employee on Oct 6, 2014
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Can I take a >256K sample FFT with AD9625 using HSC-ADC-EVALEZ?

 

Yes, you can take an FFT with as many as 4M samples using the following instructions:


Attached is the Deep FFT FPGA code that you need to load within Visual Analog in place of the standard .mcs file. (the file must be unzipped)

The code will only work for the 8 lane case (1300MSPS – 2500MSPS).


You will need to make these settings:

  • In Visual Analog-


In the ADC Data Capture Settings, you will need to select an FFT size length up to 4M in the general tab.  8M is available to select, but will not work correctly.


In the Capture Board tab, you will need to check the ‘Capture data from RAM’ box.


  • In SPI Controller-

In ADCBase1 tab register 0x5F you will need to disable the JESD204x Serial Frame Alignment Character Insertion (FACI) by checking the box (defaults to enable).


In ADCBase1 tab register 0x6E you will need to disable the JESD204x Serial Scrambler Mode by unchecking the box (defaults to enable).


Thanks,

Ian Beavers

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