FAQ: Enhancements in Hardware Loop in Blackfin+ core

Document created by ColinJ on Jul 24, 2014Last modified by ColinJ on Aug 1, 2014
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The new Blackfin+ core supports loading of immediate value to the  loop counter of Hardware loop. A 10 bit unsigned immediate value can be loaded into Loop counter. So count less than 1024 can be loaded into loop counter. In this new instruction, we can not specify the top of the Loop. The instruction immediately after LSETUP is considered to be TOP of the loop.


Assembly Syntax

  LSETUP(Bottom) LC0=uimm10;                   

    // Body of loop

    Bottom:


The Blackfin+ core have two additional loop instructions. LSETUPZ instructions skip the hardware loop when the initial value of the counter is equal to Zero. LSETUPLEZ instructions skip the hardware loop when the initial value of the counter is  less than or equal to Zero. These instructions eliminates the need of comparison and jump instructions in some cases where intial count has to be checked againt zero or for a negative value. LSETUPZ and LSETUPLEZ instructions that jump directly to the instruction after the end of the hardware loop when the initial count is == 0 or 0 Hence it improves performance. LSETUPZ and LSETUPLEZ instructions only supports loading loop counter from P register.


LSETUP instruction at the end of a another loop is illegal. The assembler will generate an error if such instruction is found.


Assembly Syntax

  LSETUP(Bottom1) LC0=uimm10;                 

    // Body of loop

Bottom1:LSETUP(Bottom2) LC1=uimm10; //error

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