Blackfin GPIO Open-Drain Functionality

Document created by jobo23 Employee on Jul 17, 2014
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Some system devices may require the host processor to utilize an open-drain driver to control its input.  Though Blackfin GPIO do not natively provide this function, the behavior can be emulated by taking advantage of the default GPIO pin behavior and processor reset state.  By default, all GPIO pins are configured as inputs with the input buffers disabled.  When configured in this fashion, the state of the pins is high impedance; therefore, when coming out of reset, all GPIO pins are three-stated, which is the same as what an open-drain output would be when not driven to 0.  If the GPIO is then set to be an output by setting the appropriate direction bit in the DIR register, the processor will drive 0 to the pin because that is the reset value of the port data register (0x0000).  As long as software never sets the corresponding bit in the data, set, or toggle registers, the pin will never be driven to 1, which is the requirement for an open-drain output.  If the desire is to then stop driving the 0 to the pin, all the application needs to do is clear the direction bit in the DIR register to return the pin state to high impedance.


Of course, the critical component to this method is that it is up to the developer to ensure that software NEVER sets the corresponding bit(s) in the data, set, or toggle registers.  If the direction bit is set as an output, the hardware cannot be configured to prevent driving the output high.