ADuCM350 FAQ CRC accelerator

Document created by vinodbableshwar on Apr 24, 2014Last modified by vinodbableshwar on May 2, 2014
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1. What are the possible input sources for the CRC block?

>> The CRC accelerator can be used to compute CRC for a block of memory locations in the SRAM, flash, or any combination of memory mapped registers.

 

2. Is there any restriction on the input data size?

>> Yes. CRC works on 32-bits data words only. For data words less than 32-bit, the processor has to pack the data into 32-bit data units

 

3. Is the CRC polynomial programmable?

>> No. The CRC polynomial is always x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1

 

4. How many processor cycles are needed by the CRC block for one computation?

>> The accelerator takes two clock cycles to compute CRC for one data item. The processor can send one data item for every two clock cycles. therefore, the Cortex-M3 does not need to wait between data transfers to the CRC accelerator.

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