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Net names are not recognized in the hierarchical designs plots

Category: Software
Product Number: LTspice
Software Version: 26.0.2

Hello to the community!

It is not an issue but a feedback for the developer. Maybe they will take it into considerations in the future versions. Consider the following usecase.

I have a circuit named "power.asc". And I'm testing/debugging it in a few higher-level files named "power_test_1.asc", "power_test_2.asc" and so on. Each contains a specific scenario to evaluate. So I follow the "Hierarchy"  chapter in the help and create the "power.asy" symbol containing the ports.

A little problem is now it is impossible to name so it is used in the plot. Just V(${NODE_NUMBER}). Here is the depiction:

The "+VSYS" name is plotted as simple V(n002). Neither the "+VSYS" nor "TEST_NAME" are recognized.

It is not a big deal for most people. But recently I was preparing the report, and it took me a bunch of time to create a readable legend for the traces using Paint.
:-D 

I believe that the root cause is hidden somewhere deep in the netlist processor, so it may be a little difficult to fix. So something like an "alias name" for the trace on the plot will be highly appreciated by the strugglers like myself. The node name remains the same, but it has the human-readable name.

Thanks for your attention.

Edit Notes

Fixed a typo.
[edited by: ElShang at 6:46 PM (GMT -4) on 5 Jun 2026]
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  • Hi again ElShang,

    A few more FYI's -

    In your picture, you show a net that has two Labels attached to it, +VSYS and TEST_NAME.  It is not a good idea to do that.  Every net or node in SPICE can have only one nodename.  By attaching two Labels, you are suggesting that it has two nodenames.  But that is impossible since it can have only one.  Fortunately, LTspice can usually figure it out.  It does that by arbitrarily choosing one of the two names and ignoring the other.  But it also remembers the other one you tried to use and it attempts to "alias" it back to the nodename that it chose.  However, there are situations where this fails.  In all cases, you should use only one nodename (one Label) attached to any net.

    Also you wrote that "it is impossible to name so it is used in the plot."  I understand the frustration, but actually that is not quite true.  Any subcircuit net that reaches a wire in the top-level schematic gets (inherits) the nodename from the top-level schematic.  Therefore, its name in the top-level schematic is the one you should use and reference in waveform plots.

    If there is confusion about finding what a subcircuit's nodename was changed to, LTspice makes it easy to avoid worrying about that.  When you have the top-level schematic and the waveform window open in LTspice, use your mouse and click on the hierarchical symbol to "move" into that subcircuit.  Now you can click on any of the wires in that lower-level schematic, and LTspice will plot it.  You don't need to know what its nodename happens to be.

    If you are creating plots for publication and need them to show specific nodenames, just make sure that each node whose waveform you want to plot comes out on a "pin" and then connects to a top-level net with a name on it.  Those top-level nodenames are the ones you will see in the plots.

    Andy

  • Hi  ,

    In your picture, you show a net that has two Labels attached to it, +VSYS and TEST_NAME.  It is not a good idea to do that.  Every net or node in SPICE can have only one nodename.  By attaching two Labels, you are suggesting that it has two nodenames.  But that is impossible since it can have only one.  Fortunately, LTspice can usually figure it out.  It does that by arbitrarily choosing one of the two names and ignoring the other.  But it also remembers the other one you tried to use and it attempts to "alias" it back to the nodename that it chose.  However, there are situations where this fails.  In all cases, you should use only one nodename (one Label) attached to any net.

    Good advice.

    LTspice does offer a workaround, namely, the jumper symbol. In this particular case, within the sub, you could use a jumper to tie the two node names together. From the help (admittedly buried):

    There is one special symbol, jumper, that does not translate into a circuit element, but is a directive to the netlist generator that there are two different names for the same electrically identical node. 

    The prefix for a jumper in LTspice is J, not to be confused with a JFET. In LTspice, the prefix for a JFET is either JN or JP. Of course, the jumper is not netlisted, so there is no confusion in the SPICE netlist, as the jumper only serves to inform LTspice's netlister. Below shows how Jumpers and JFETs coexist in LTspice.

    mike

  • Wow, that's cool. A neat feature indeed.

    Thank you for sharing!

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