Hi,
I've probably made a simple/obvious mistake but I'm not getting the expected results when simulating the LTM8060F with all channels synchronized to an external clock. The circuit being simulated has the LTM8060F generating four different voltage rails. The channels will all be synchronized to the same 1.25MHz clock, with channels 3&4 running at half of the clock rate (625 kHz). Per the datasheet, the Rt resistors are set so that the internal oscillators start up at a lower frequency than the synchronization clock (RT34 has been set to 200kOhm in the simulation to have the lowest clock frequency and make sure of this).
In the output waveform, the ripple on channels 1 & 2 has the expected frequency of about 1.25 MHz, while the ripple on channels 3 & 4 is not 625kHz, but about 200kHz (the frequency from the RT value). The CLKOUT12 and CLKOUT34 waveforms both closely match the SYNC12 and SYNC34 waveforms respectively, so that matches the behaviour I'd expect based on the datasheet. I also created a copy of the circuit and swapped the components and connections for channels 1/2 with 3/4. The output waveforms now showed a channel 1/2 voltage ripple of 625kHz (expected), but the 3/4 ripple was still at 200kHz (not 1.25MHz).
Am I misunderstanding the operation of the LTM8060F? Is this the expected SYNC34 behaviour for the part or is this an issue with the model? (Or, more likely, is there a problem with the simulation I have set up?)
Thanks in advance,
Trevor