Doing a simple ltspice simulation with LT8625S example circuit gives me very weird results. I need to simulate in order to test stability with further elements in the control loop (additional LCs) to attenuate ripple, but so far I'm only testing vanilla examples.
I added a FRA block and started simulating to obtain the gain / phase responses of the open loop buck after fiddling in LTPowerCAD for a VIN=12V and Vout=3.3v.
But the phases are weird and all over the place, and don't resemble a typical buck. Gain as well. Even when doing more accurate/lengthy simulations. They don't match LTPowerCAD either (which shows something that makes much more sense).
I used LTPowerCAD's exported design and LTSpices default example. Both show weird responses. It feels like either I'm wrong about where to place .fra block, or the LTSpice model is buggy.
See attached ltspice file and screenshots of LTPowerCAD and LTSpice.
Removed bad image (control to loop)
[edited by: yannickb at 7:46 PM (GMT -5) on 8 Feb 2025]
