In my LTSpice simulation of the model by analog.com LT8638S loses sync signal if Vin goes above 37 V.
It also loses sync signal if Vc goes to 0, but maybe this is not such a problem(?)
(The whole schematic contains also a high voltage, fixed ratio DCDC, at low frequency the control loop includes this HV DCDC, but there is a fast lane feedback from the LC filter of LT8638Ss in case somebody asked. But high input voltage causes problems in the reference schematics also.)
I would like to know if only LTSpice model exhibits this (mal)function, or the actual product behaves the same way? Can I get it work well? Can this be solved by 2 external clocks out of phase?
And overall: can this part be used to generate output voltage close to Vin, if Vin is close to absolute maximum?
Expanded Title; added keywords
[edited by: MStokowski at 11:12 PM (GMT -5) on 18 Nov 2024]