MCLK needs to be connected and needs to be oscillating in order for the IC to
function. It synchronises all activity in the AD9833. I don't understand why
you want to disconnect MCLK. Is it to save power?
On the SPI interface, the SCLK MUST BE HIGH at the instant that the FSYNC
falling edge occurs or else the interface will not function correctly. See page
9 of the Rev A datasheet.
- FSYNC Must therefore go low before the first SCLK falling edge,
- There are 16 falling edges in total while FSYNC is low for each of the data
- FSYNC must return high at earliest 10ns after the 16th SCLK falling edge or
at the latest 5ns before the 17th SCLK falling edge.
See page 3 of the AD9833 datasheet.