signal. This works perfectly, however I am getting noise on the analogue output
relating to FQ_UD or D0 to D7 (hard to tell). Unfortunately I am updating at
such a rate for this to be audible. Currently I have an analogue and digital
ground plane which are split and connected under the IC (you datasheet
recommends connecting grounds at the device). Unfortunately I am limited to a 2
layer board. I am running the device from 1 Vdd (the analogue one). Have you
any recommendations? Would it be best not to have any GND plane under the
device itself? Is it worth separating the Vdds (separate traces back to power)?
Datasheets for products often base their grounding recommendations on a simple
evaluation system, where the optimum performance is obtained by supplying AVDD
and DVDD from separate supplies, and using two separate grounds which are
joined at the mixed signal device (ADC, DAC etc). This is not always
representative of real systems, where a lot of digital logic is also present.
Rev H of the AD9850 datasheet shows the schematics and layout of the evaluation
board, which only has one ground plane.
The question is how to retain a quiet analog ground and supply in the presence
of noise from fast digital circuits. Let's consider the on-chip digital
circuits (on the AD9850) and the external digital circuits (processor, FPGA,
It is important to separate the DDS supplies and ground from the SYSTEM DIGITAL
GROUND. This is likely to contain a large amount of noise and the less of it
gets near the AD9852 the better. So the AVDD and DVDD, AGND and DGND of the
DDS should be supplied from the SYSTEM ANALOG SUPPLY.
For the digital circuits on the AD9850, they share the same die as the
sensitive analog circuitry, so some coupling of noise onto the analog side is
unavoidable. If the digital supply of the DDS is filtered, and thoroughly
decoupled to a low impedance ground, the DDS circuitry will cause minimal noise
in the Analog ground plane.