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Documents AD9912: maximum PFD frequency
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AD9912: maximum PFD frequency

Q 

I have a question about the input system clock of AD9912.
The maximum input frequency range is 200MHz without SYSCLK PLL Doubler shown as
the figure 1.
But the maximum input rate of system clock PFD is only 100MHz, so I think the
actual input of SYSCLK should not exceed 100MHz. Is that correct? If so, there
should be something wrong with the datasheet.

 

A 

The maximum PFD frequency should change to 200MHz. We will make a change at
next revision of the datasheet.

Attachments:
AD9912_maximumPFDfrequency.docx
Tags: ad9912
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Related Content
  • AD9912: maximum PFD frequency
    MSDAPI
    Question I have a question about the input system clock of AD9912. The maximum input frequency range is 200MHz without SYSCLK PLL Doubler shown as the figure 1. But the maximum input rate of system...
  • RE: AD9912 Init phases value.
    ADIApproved
    Do you have 3 AD9912 Evaluation Boards or 3 AD9912s on your own custom PCB? Are you driving the SYSCLK input with a relatively low frequency and multiplying the input frequency via the integrated SYSCLK...
  • RE: sys clk on eval board
    ADIApproved
    Sorry for the delay response. The input impedance of the SYSCLK input on the evaluation board should be ~50 ohms. The SYSCLK path consists of a balun with two 25 ohms resistors to ground on the balanced...
 
Related Content
  • AD9912: maximum PFD frequency
    MSDAPI
    Question I have a question about the input system clock of AD9912. The maximum input frequency range is 200MHz without SYSCLK PLL Doubler shown as the figure 1. But the maximum input rate of system...
  • RE: AD9912 Init phases value.
    ADIApproved
    Do you have 3 AD9912 Evaluation Boards or 3 AD9912s on your own custom PCB? Are you driving the SYSCLK input with a relatively low frequency and multiplying the input frequency via the integrated SYSCLK...
  • RE: sys clk on eval board
    ADIApproved
    Sorry for the delay response. The input impedance of the SYSCLK input on the evaluation board should be ~50 ohms. The SYSCLK path consists of a balun with two 25 ohms resistors to ground on the balanced...
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