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Documents AD9951: REFCLK inputs
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AD9951: REFCLK inputs

Q 

I would like to know what reference clock is the most adapt for the AD9951.
I want to used a cristal oscillator for a high frequency stablility  but I
don't find in the AD9951 datasheet what kind of level (CMOS, clipped sine,
sinus, etc) I have to use. And the input impÃCopyrightdance is 1.5KOhms, isn't it ? 
because the input power expressed in dBm is usualy for 50ohms.
do a small clock amplitude reduce a lots the phase noise performance ?

 

A 

The AD9951 reference input is normally driven with a sine wave.
It is AC  coupled (with a capacitor) and if a single-ended drive is used the
other  clock input is decoupled with another capacitor.
The drive level must  not be over 1.8 V pk-pk (0.64 V r.m.s.) with a 1.8V
supply, but may be  as low as 100 mV r.m.s.
However it is better to use as large a drive as  possible to minimise phase
noise.

If you drive the reference input with a square wave it must have a duty  cycle
of close to 50% and logic levels (for 1.8V supply) of logic 0<.4V  and logic
1>1.25V.
If you use the PLL clock multiplier with logic inputs  the duty cycle may be
slightly worse - between 35% and 65%.

Driving differentially is more recommended. Better common mode rejection is
achieved. 

However, two things to be careful about

- Common mode level of the AD9951 input.
The differential inputs are biased around 1.35V which is different from the
common mode level of LVPECL outputs. Probably best therefore to ac-couple the
clock (using series capacitors) if using  ICS8432-101 3.3V LVPECL Frequency
Synthesizer or similar.

- Jitter of the output. The stated output jitter is 5ps rms. While this might
seem good performance, it is not really adequate to get 14 bit SNR performance
at more than 1 or 2 MHz.

Tags: ad9951
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  • AD9951: REFCLK inputs
    MSDAPI
    Question I would like to know what reference clock is the most adapt for the AD9951. I want to used a cristal oscillator for a high frequency stablility but I don't find in the AD9951 datasheet what...
  • ad9951: REFCLK input considerations
    GenevaCooper
    Q The AD9951 has input clock, according to data sheet it can be operated by: 1. Crystal 2. Single ended We need to know the follow: 1. The ref clock input what type technology it is: LVTTL/LVCMOS/LVPECL...
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    Q In AD9951 datasheet, the description of reference clock signal is limited. It is specified only the max applicable power. Can you confirm that using sinusoidal signal is equivalent than squared (ECL...
 
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  • AD9951: REFCLK inputs
    MSDAPI
    Question I would like to know what reference clock is the most adapt for the AD9951. I want to used a cristal oscillator for a high frequency stablility but I don't find in the AD9951 datasheet what...
  • ad9951: REFCLK input considerations
    GenevaCooper
    Q The AD9951 has input clock, according to data sheet it can be operated by: 1. Crystal 2. Single ended We need to know the follow: 1. The ref clock input what type technology it is: LVTTL/LVCMOS/LVPECL...
  • AD9951: Clock signal
    GenevaCooper
    Q In AD9951 datasheet, the description of reference clock signal is limited. It is specified only the max applicable power. Can you confirm that using sinusoidal signal is equivalent than squared (ECL...
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