Q
1)
We plan to use a crystal oscillator as reference clock (meaning not a discrete
XTAL + capacitors, but one of these silver-cased integrated 5V clock sources).
We would like to connect it single-ended to the refclock input of AD9953.
In the datasheet it says "To achieve the best possible phase noise, the largest
amplitude clock possible should be used."
With our 5V oscillator, the clock will swing between c. 0,5V...4,5V, is this ok
for the input or is it 3,3V or 1,8V max?? Or how should I connect such an
oscillator?
2)
Generally, must I DC-decouple the external Refclk signal with a capacitor
between DDS refclk input and clock source in single-ended mode?
3)
In the datasheet nothing is mentioned about the power-up sequence and
initialization, what has to happen with the Reset pin and do I have to obey
other rules at powerup (is reset generated internally)?
4)
Does more than the schematic of the eval board (AD9954) exist to help with a
design? (Like a design guide or more application schematics)?
This would be interesting to avoid mistakes in design.
Would you additionally please help me with the following questions regarding our
current AD5644 nanoDAC design:
5)
When supplying the AD5644 as mentioned in the datasheet with 5V from a REF195,
is it ok to talk to the DAC with a 3.3V logic level SPI Bus connection? Does
this mean any drawback in SPI speed or will it not work?
A
1) The 5V crystal oscillator would not be suitable. The clock is reference to
AVdd and AGND , therefore you should be looking at some thing approx 1.8V. See
Evaluation PCB for more information.
2) Not necessarily. This is not required. You can connect it directly to the
IC. ( just note that the the 0.1uF Cap must be non the unsed Pin )
3) At power Up: Reset is not required, but is available.
The power-Up state of the Ad9953 is Single Tone mode.
Wake-Up time takes approx. 1 ms.( see note 2 page 5 )
The Shaped-On/OFF keying is disabled.
The phase Accumulator is cleared.
All sections can be powered down individually.
The Oscillator is not powered down to avoid long start up time.
4) Unfortunately, we don't. But there are other schematics available for the
other DDS IC's, AD9958/59
5) Ad5644: is it ok to talk to the DAC with a 3.3V logic level ?
Yes it is, the datasheet on page 4, indicates that a Vinhigh, of 2Vmin.this
indicates that the 3.3 V logic high input will work fine. But ensure that the
logic low is lower than 0.8V.
