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Direct Digital Synthesis (DDS)
Direct Digital Synthesis (DDS)
Documents AD9954 power consumption on power down?
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    • AD9954 phase/amplitude dithering
    • AD9954 power consumption on power down?
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    • AD9954: DACP pin connected to AGND
    • AD9954: Effect of REF CLK
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    • AD9954: Spur at SYSCLK/4
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    • AD9954: What is the relationship between the power consumption and the frequency of the system clock?
    • the introduction document of AD9954 evaluation
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AD9954 power consumption on power down?

Q 

I would like to know what is the AD9954's power cunsumption for each state on
powerdown (refer to Table 9 of the datasheet, Rev.B

 

A 

Please see estimated results attached for the AD9954 power consumption in
different powerdown modes.
Recorded in this excel are the current consumption numbers for the powerdown of
the other blocks of the AD9954YSVZ (CLK INPUT,DAC, COMPARATOR); this was done
when the part had only a 400 MHz REFCLK with no output, and a 400 MHz REF CLK
with a single tone of 160 MHz.

Attachments:
AD9954_powerdown_CURRENT_CONSUMPTION.xlsx
  • ad9954
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