ADF4159
Recommended for New Designs
The ADF4159 is a 13 GHz, fractional-N frequency synthesizer with modulation and both fast and slow waveform generation capability. The part uses a 25-bit...
Datasheet
ADF4159 on Analog.com
HMC1161
Recommended for New Designs
The HMC1161 is a monolithic microwave integrated circuit (MMIC), voltage controlled oscillator (VCO) that integrates a resonator, a negative resistance...
Datasheet
HMC1161 on Analog.com
I am using the ADF4159 PLL with an external HMC1161 VCO and an active loop filter designed using ADISimPLL. The loop filter parameters are:
Loop Bandwidth: 735 kHz
Phase Margin: 48.2°
Components: R1=220Ω, C1=33pF, R2=1.2kΩ, C2=560pF, R3=1kΩ, C3=15pF, C4=68pF
Symptoms:
Vtune is stuck at +15V (op-amp positive rail).
CPOUT voltage is 0.821V when connected, and OPBIAS is set to 1.421V.
When CPOUT is disconnected:
If inverting input voltage 1.42V, Vtune = 0V.
LD pin remains low, indicating no lock.
Troubleshooting Done:
Verified ADF4159 register settings:
ICP=2.5 mA , PFD frequency = 100 MHz, N-divider set for HMC1161’s 9.1–10.2 GHz range.
Checked op-amp functionality: Works as a comparator but not as an integrator.
Confirmed loop filter connections: No open traces or cold joints.
Tested VCO independently: Works fine with manual tuning.
Questions:
Why is the op-amp acting as a comparator instead of an integrator?
Could the ADF4159 charge pump be misconfigured? Are there specific register settings I should double-check?
Are there any common pitfalls in the ADF4159 + HMC1161 + active loop filter setup that I might be missing?
How can I ensure the loop filter is stable with the given phase margin (48.2°)? Should I add a damping resistor or adjust component values?
Can you share the ADISimPLL file?
Can you double check the PFD polarity? if the OPAMP is in inverted configurations you need to change the PFD polarity to negative.
Thanks
Emrecan
Hi,
I saw that you have implemented the loop using div-by-2 output of the HMC1161. But, in the above, it is stated that N divider is set for fundamental operation.
How did you connect HMC1161? If you are using div-by-2 path, you need to set N divider accordingly.
Additionaly, can you try to measure Vtune voltage at fixed frequency without the ramping enabled.
As a final debug, you can connect MUXOUT pin of the ADF4159 to oscilloscope and measure the R Divider output and N divider outputs. These measurements give insights about the frequency comparison and we can estimate if N divider values are correct.
Thanks,
Emrecan