No output Signal

Hi cecile317 ,

Apologies for the late response.

Is there a way you could examine the read/write SPI transactions on a logic analyzer? I just wanted to ensure that the communication between the device and the software is established and to verify if the writes are successful.

Also, aside from this specific application, have you tried using your custom board and made it work?

All the best,

Jules

Bonjour Cécile,

i am working with a different part. But there are similarities with the problem you reported. A first observation was with an old post from 2015 : doing 2 io updates appeared to help the values written to actually be stored. A further improvement for my case was avoiding tampering with the values of 'open' or unused bits . In the case of the ad9957 , changing some of those bits changed the values of other bits of that register. So the read back was not the same as what was written. In my case, if i understand correctly, it turned off the input rf signal. So no output was observed . I am still troubleshooting however that board.

Henri

Hello,
I have updated my original post with pictures of the SPI transaction from my oscilloscope, showing a simple write and then read of the CFR1 register.
The communication seems to be fine. Moreover, I can set the PLL and observe the change at the clock output pin (please refer to my original post).
However, the device behaves strangely; some bits appear and disappear, but already the same.

Apart from the DDS, the board works perfectly. I can use the USB port, write to different memories (using a different SPI bus than the DDS), and so on.

Thank you for your help.

Cécile

Bonjour Henri,

Thank you for your help.

Your old post :
SPI configuration issue
Is really interesting...

If I try to write 0x02 to the second byte of CFR1, I observe the following :
- bit 6 of byte 0  in the CFR1 register is set to 1, so we have : 0x00 0x00 0x02 0x40
- register CFR2 is set to  0x14 0x00 0x00 (MSByte first). But we should observe 0x18 0x00 0x00 instead (reset state).
- register ASF : 0xdc 0xc0, but we should observe 0x00 0x00 at reset.
- register ARR : 0x0e, or 0x4e, or 0x4f (the other registers are in the same configuration at each reboot/reset but this one behaves inconsistently)
- register FTW0 : 0x00 0x00 0x00 0x00... Which is correct !

I observe the signal with my oscilloscope, and everything is ok. I used two io/update each write/read.

Cécile

Hello,

Can you send to me the GPIO state of each pin and register configuration of the development kit in the single tone mode ?

Thank you,

Cécile

the assumption that the reset is 0 for all registers is incorrect for the ad9957 part and from what you observed, also the one you are using. .  those non reset  bits did not need any change. i changed only the bits that needed changing , after this , the part worked as expected. A read with bit level logic operations of the bits that need change appears to be all that is required

Hello Henri,

I don't think that all register must be to zero too, but even these bits are different of what is given in the datasheet.

Henri said:

A read with bit level logic operations of the bits that need change appears to be all that is require

I think you are absolutely right. That's why my algorithm doesn't change any of unused bits...
For example, the single bit set in my previous message is just to enable a GPIO needed for reading, and that's all.

Or have I accidentally modified some unused bits?

Kind regards,

Cécile

Hello everyone,

I finally found my mistake: the DAC is referred to AVDD, so my
load resistors must by tied to AVDD, no AGND.

After this modification, the DDS works as expected.

However, my load resistor must be modified, the output amplitude is too high, with a high distortion.
I will redesign the filter with a 25 Ohm impedance.

Thank you everyone for your help !

Cécile