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Phase relationship between REFCLK and SYNC_CLK

Category: Datasheet/Specs
Product Number: AD9959

Hello,

Is there a fixed phase relationship between the external REFCLK and the PLL generated SYNC_CLK?

I'm curious if I can drive the profile pins based on REFCLK vs SYNC_CLK since this clock directly drives a PLL on my FPGA.

Thanks,

Joshua