Hello,
Is there a fixed phase relationship between the external REFCLK and the PLL generated SYNC_CLK?
I'm curious if I can drive the profile pins based on REFCLK vs SYNC_CLK since this clock directly drives a PLL on my FPGA.
Thanks,
Joshua
AD9959
Recommended for New Designs
The AD9959 consists of four direct digital synthesizer (DDS)
cores that provide independent frequency, phase, and amplitude
control on each channel. This...
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AD9959 on Analog.com
Hello,
Is there a fixed phase relationship between the external REFCLK and the PLL generated SYNC_CLK?
I'm curious if I can drive the profile pins based on REFCLK vs SYNC_CLK since this clock directly drives a PLL on my FPGA.
Thanks,
Joshua
Hi jsimmons0311 ,
I tried to do some measurements in the lab and I can safely conclude that there is no fixed relationship in terms of phase between REFCLK and SYNC_CLK. I tried different frequencies and their giving me different phase difference.
All the best,
Jules
Thank you so much for looking into this.
Thanks!