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AD9910+BPSK+ RAM Direct Switch Mode with Zero Crossing

Category: Hardware
Product Number: AD9910

    Hello, regarding the use of AD9910, I would like to ask about BPSK modulation.

    I need to use FPGA to control AD9910 and modulate a 50MHz sine signal with a 50MHz M-sequence. At first, single frequency modulation was used, with the profile0 register storing the phase as 0 and the profile1 register storing the phase as π, and then switching pins to achieve phase reversal. However, the effect was not very good after the frequency increased.

    Then I tried to use RAM mode for BPSK modulation, and now I want to use RAM Direct Switch Mode with Zero Crossing to achieve it. I have now written two parameters in RAM, 0000_0000 and 8000_0000, to represent the phase values of 0 and π. The starting and ending addresses of Profile 0 are both 0, and Profile 1 is also switched between 0 and 1.But now it's always impossible to achieve, is it because there's a problem with my method? Or did I misunderstand the meaning of phase?

The value I set is

CFR1=A040_0000,

CFR2=0040_0820,

CFR3=1D3F_4132.

Profile0=0800_0500_0000_0008

PROFILE1=0000_0500_4000_4008

FTW=0CCC_CCCD

Other registers are not set, keep default. I have tried adjusting the parameters of the register, but the waveform is always not ideal and sometimes the phase flip cannot be displayed.

    May I ask if there is a problem with my method, the parameter settings, or the need to add some register control? The attachment contains the currently generated signal images and videos.

    I hope you can quickly  identify my problem and tell me how to solve it. Thank you very much for your help.

  • Hi  ,

    By any chance can you send me your setup file? If you're using the evaluation software this can be generated. Please zip the file since EZone does not allow attaching it. 

    All the best,

    Jules

  • 您好,感谢您的回复。我没有使用评估软件,我使用FPGA进行控制。请问安装文件是否引用了我的控制代码?或引用其他内容。如果它引用控制代码,我已经压缩并附加了它。

    我希望你能指出我的问题并告诉我解决方案。希望您能尽快回复。谢谢。

  • Hi  ,

    Apologies but I won't be able to check your custom code. All I can do is check your register settings and check is something is hindering it. 
    I read that you are using an FPGA to control it externally. I suggest you read this FAQ for your guide on which registers and bits you need to set. 

    I noticed you said the output is all over the place when you increased it. I want to suggest issuing an I/O_Update whenever you make changes to registers.

    And lastly, just wanted to clarify what is your reference input frequency?

    All the best,

    Jules

  • Hello! Thank you for your reply.

    Sorry, I'm not quite sure what the reference input frequency means. Does it refer to the input external clock frequency? I am using a 40MHz external clock.

    Also, I have another question to ask. If I choose to use zero crossing mode and want it to work properly, do I need to enable the matched latency, auto clear  phase accumulator, and clear phase accumulator functions in CFR1/CFR2? Will these settings conflict with zero crossing? Or do I need to add or remove some other controls? Thank you.

  • Hi  ,

    I believe if you're using the RAM Direct Switch Mode with Zero Crossing, you won't need things like auto clear phase accumulator, and others. It is because when you enable zero-crossing, it causes the DDS to delay the application of a new phase until such time as the DDS phase accumulator rolls over from full scale to 0 which I believe is the same when you enable auto clear phase function. 

    All the best,

    Jules

  • 您好,我再次尝试了RAM模式。设置后,开关引脚未产生所需的相位反转。可能的原因是什么?我需要做些什么来实现它?谢谢。您好,我再次尝试了RAM模式。设置后,开关引脚未产生所需的相位反转。可能的原因是什么?我需要做些什么来实现它?

    另外,这是我之前使用单频模式生成的波形,每次相位反转后都会有一些变化。附上它的形象。请问我需要采取哪些步骤来获得理想的波形,需要设置哪些参数?

    谢谢