Issues generating 4 DDS sine waves with independently variable amplitude, phase, and frequency

Hi Vishwanath ,

Thank you for your interest in AD9106. Each DAC channel can independently control gain and phase based on the on-chip DDS. However, the 4 DACs cannot have different frequencies if the on-chip DDS is used because, as you mentioned, the DDS is a global shared resource. To generate different frequencies for each channel, you must generate a sinewave using the on-chip SRAM, and each channel will have an allocated start/stop address. Related query here: (+) Output different frequencise on AD9106 - Q&A - High-Speed DACs - EngineerZone (analog.com). More details on Page 27 of the datasheet. 

Also, the DDS tuning word only affects frequency, not the amplitude of the waveform. It's likely that there is a component in your output datapath that has a certain bandwidth so increasing the frequency attenuates your waveform. Can you share your schematic? If all the 4 DAC datapaths are identical, the outputs in the 4 channels should be the same.

Also, if a register will not be used in your application, please set it to its default value as it will likely have an effect on your waveform. For instance, Register 0x0E is set to 0 when is should be set to 0x0E. 

Best regards,
Marco

Would you recommend we use an external clock to obtain better performance at low frequencies? The most important thing for us is to be able to control phase, amplitude and DDS frequency independently of each other.

Hi Vishwanath ,

I agree it's unnatural for DAC2 output to have 10x less voltage than the other DACs. What version of EVAL-AD9106 are you using? If you could probe at the DAC2 outputs directly (with the jumper connections removed in JP9/JP10) and see if the issue still persists. If the output is still less than the other DACs, there might be a problem with the evaluation board. 

ad9106-ardz-ebz_schematic.pdf (analog.com)

Also, since you are operating in low frequencies (Hz-kHz range), the clock solution in the Evaluation Board needs to be configured for this low frequency. The clock input has to be lowered (max of 100 kHz?) so it's still proportional for an output of 2Hz-2kHz, then you can follow Figure 39 in the datasheet (single ended 1.8V CMOS clock) like below. The balun T9 needs to be bypassed, or be replaced with a Balun with a bandwidth that accommodates a lower frequency. You may also try to increase the value of the coupling capacitor (C44) or short that component altogether to ensure that the input clock frequency won’t be blocked.

Regarding the FAQ# 14, the clipping when (digital data x digital gain) + digital offset is greater than the IOUTFS is for the current out of AD9106. The current is only limited to the range 0 to IOUTFS, and anything beyond this is clipped. It is not related to the waveform clipping you observed in the oscilloscope. For the full-scale current, IOUTFS = 32* Vrefio/Rsetx. Nominally, VREFIO is 1V and RSETx is 8kΩ which gives an IOUTFS of 4mA. 

For the I2C, you can connect to the I2C pins in the Arduino Uno, but make sure that you use a different subordinate address for the other devices you will be connecting, as 0x52 is reserved for the EEPROM in EVAL-AD9106. 

Best regards,
Marco

Hi Marco, 

Thanks for the feedback. We made a repost here with some of the updates we've had. Notably, the DAC2 issue isn't present in our replacement EVAl-AD9106 board. 

We will look into using an external clock input to achieve better low frequency performance. With that in mind, do you know where we could find data on the frequency dependence of the amplitude and phase of the board? 

If the waveform clipping we observed on the oscilloscope isn't related to the limiting of the full scale current output, do you know what could be causing it? We are getting output rms voltages of around 450mV maximally when sourcing from the DDS and using the on-board amplifiers before we see clipping. 

How could we calculate what the expected voltage output of the EVAL-AD9106 board will be given the register values? 

Thanks,

Vishwanath. 

Thanks for the heads-up, I will provide a response to that thread instead. 

Thanks for the heads-up, I will provide a response to that thread instead.