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Issues generating 4 DDS sine waves with independently variable amplitude, phase, and frequency

Category: Hardware
Product Number: AD9106
Our ultimate goal is to be able to generate 4 sine wave voltages with independently variable phase, amplitude, and frequency. We are able to successfully control the AD9106 and have confirmed that we can read/write to registers, start/stop/update patterns and have observed example waveforms on an oscilloscope. We recently attempted to program the AD9106 to output identical sine waves on each of the DACs by uploading the data values in the myVals array to the corresponding addresses in regAdd provided below. DACs 1,3, and 4 appear to be identical, however, DAC2 is outputting about 10x less voltage and has a noticeable phase shift as seen in the attached picture. We replaced the connections to DAC2 and went over the register values, but we cannot find any place where DAC2 differs from the other DACs. The relevant registers for DAC2 we found are 

DAC2DOF 0x24
DAC2_1PATx 0x2B
DAC2_CST 0x30
DDS2_PW 0x42

What could be causing the output problems on DAC2 and how could we fix them?

Moreover, we want to be able to control the parameters of the waves independently of each other. For amplitude and phase, we accomplished this using the DACX_DGAIN and DDSx_PHASE registers. Since the DDS is a shared resource, we figured that the frequency of the sine waves can't be modified independently. However, we noticed that changing the values of the DDS tuning word in the DDSTW_MSB and DDSTW_LSB registers also affects the amplitude of the waves. The amplitudes for the waves are seen to vary proportionally with the tuning word. We would like to be able to change frequency without affecting the other parameters of the sine waves. Is this possible on the AD9106? 

uint16_t myVals[66] = {
      0x0000, 0x0e00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
      0x1f00, 0x1f00, 0x1f00, 0x1f00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
      0x0000, 0x0000, 0x0000, 0x3232, 0x3232, 0x0111, 0x8fff, 0x0101, 0x0101,
      0x0003, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x4000, 0x4000, 0x4000,
      0x4000, 0x0000, 0x0000, 0x0050, 0x7500, 0x0000, 0x0000, 0x0000, 0x0000,
      0x0002, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x0000,
      0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x0000, 0x0000,
      0x0001, 0x0001, 0x0001};
uint16_t regAdd[66] = {
    0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008,
    0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x001f, 0x0020, 0x0022,
    0x0023, 0x0024, 0x0025, 0x0026, 0x0027, 0x0028, 0x0029, 0x002a, 0x002b,
    0x002c, 0x002d, 0x002e, 0x002f, 0x0030, 0x0031, 0x0032, 0x0033, 0x0034,
    0x0035, 0x0036, 0x0037, 0x003e, 0x003f, 0x0040, 0x0041, 0x0042, 0x0043,
    0x0044, 0x0045, 0x0047, 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055,
    0x0056, 0x0057, 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e,
    0x005f, 0x001e, 0x001d};
  • Hi  ,

    Thank you for your interest in AD9106. Each DAC channel can independently control gain and phase based on the on-chip DDS. However, the 4 DACs cannot have different frequencies if the on-chip DDS is used because, as you mentioned, the DDS is a global shared resource. To generate different frequencies for each channel, you must generate a sinewave using the on-chip SRAM, and each channel will have an allocated start/stop address. Related query here: (+) Output different frequencise on AD9106 - Q&A - High-Speed DACs - EngineerZone ( More details on Page 27 of the datasheet. 

    Also, the DDS tuning word only affects frequency, not the amplitude of the waveform. It's likely that there is a component in your output datapath that has a certain bandwidth so increasing the frequency attenuates your waveform. Can you share your schematic? If all the 4 DAC datapaths are identical, the outputs in the 4 channels should be the same.

    Also, if a register will not be used in your application, please set it to its default value as it will likely have an effect on your waveform. For instance, Register 0x0E is set to 0 when is should be set to 0x0E. 

    Best regards,

  • Hello, 

    Thanks for your response. We are using the EVAL-AD9106 board as a shield for an Arduino UNO R3. It is mounted directly onto the Arduino which is powered by USB. We will look into using the SRAM to modulate the sine wave frequencies individually.

    We also uploaded example 3 from the AD9106 data sheet using the register values from this example code and observed that DAC2 still outputs around 10x less voltage than the 3 other DACs. We are concerned that the output may be broken somehow, but aren't sure how to check. 


  • Hi  ,

    For creating the sine wave vector to be written onto the SRAM, you may use any pattern generator softwares. For ADI, we have the ACE Vector Generator Tool (found thru this link: ACE Software). This can generate the vector to be stored in SRAM so that you could configure the waveform to your liking (amplitude, frequency, type of waveform, data format, etc.). See FAQ#10 in this link for more details. 

    In the AD9106 evaluation board, are you using the Balun output or the Amplifier output? Can you try testing the output in both cases (refer to AD9106 & AD9102 Evaluation Boards [Analog Devices Wiki] for the board connections) and see if the that fixes your issue? The AD9106 datapaths are all the same in the evaluation board so there should be no issue there. It's likely there is a problem with your system (e.g. connections to the Arduino Uno, code, etc.). The MBED example code provided is not tested using an Arduino Uno, rather we used the SDP-K1 Evaluation Board | Analog Devices which is used as a pair with AD9106. Unfortunately, I can't test this case on my side because I don't have an Arduino Uno. 

    If the voltage is still less for DAC2 on both cases stated (Balun/Amplifier outputs), please try generating the sinusoid using the SRAM then see if the issue still persists. 

    Best regards~

  • Hello, we reconfigured the board to output through the on-board amplifiers. The DAC2 issue still persists, it outputs much less voltage than the other DACs and is noticeably less stable than the other DACs when observed on an oscilloscope. However, the previous amplitude issues have been somewhat mitigated, although we still see slight changes in amplitude when we go from the kHz to Hz range. We also noticed that phase changes with frequency, which is unideal. Ultimately, we want to be able to control the amplitude, phase and global frequency of the 4 waves all independently of each other.

    Our use-case involves producing waves with frequencies ranging from 2Hz-2kHz. Is there a way we can obtain better low-frequency performance with this board?

    Beyond that, we noticed that the waves start clipping when the DGAIN register is set past 0x4000. According to Q14 from this forum , it seems that clipping will occur if the (digital data x digital gain) + digital offset > full scale current. We are wondering if in our setup, clipping is expected to occur after 0x4000. Our digital offset is 0 and our digital data is the DDS output, but we are unsure how to get an exact value on that. Moreover, we had trouble determining Ioutfsx = Vrefio/Rsetx. The register values we are using set the REFADJ register (0x03) to 0x0, which we believe corresponds to Vrefio = 1.04V according to Figure 37 in the AD9106 datasheet. However, the Rsetx values controlled by the FSADJ registers are set to 0x1f000 which differs from the reset value.

  • As an aside, if we wanted to connect an I2C device to our system on the hardware I2C pins of the Arduino UNO (SDA/SCL), would that interfere with the eval board's EEPROM which are also connected to those pins as per the schematic?

  • Would you recommend we use an external clock to obtain better performance at low frequencies? The most important thing for us is to be able to control phase, amplitude and DDS frequency independently of each other.