Post Go back to editing

Synchronizing Separate AD9959 Evaluation Boards

Category: Hardware
Product Number: AD9959

Hello all!

I'm currently trying to sync two AD9959 boards that can't be connected by the sync in/sync out SMA connections on board. Currently, I have two boards that are receiving the same REF_CLK signal, and I have sent identical output commands to each board so that channel one on each board will output the same frequency signal with the same phase offset. Then, I'm using a signal generator to send an identical pulse to the I/O update pin on each board.

My hope is that the output waveforms form both boards should be in-phase and at the same frequency. In reality, I get two wave forms that have the same frequency but are out of phase by some offset x. Additionally, when I send the same output command to each board and trigger another simultaneous I/O update, the output waveforms remain at the same frequency but are now out of phase by some new offset y. The offset is different each time I resubmit and retrigger the output command. 

My best guess from what I'm seeing and from looking at the timing characteristics of the chip is that there is some slight variation in the timing of the AD9959 chip when it acknowledges an I/O update command and pushes the output channel instruction from the buffer into the channel register. Does that sound right? Also, how could I look at synchronizing these boards without connecting them via sync out/sync in SMA connections? Thank you for your time and any assistance!

Also, I have verified that the identical REF_CLK and I/O update pulse signals are at the same frequency and in-phase via oscilloscope. 

  • Hi  ,

    I believe you are doing synchronizing multiple DDS. I hope this information will help.

    There are 3 requirements for multi-device synchronization.

    1. Time aligned for REF_CLKs. This can be done with carefully checking the board layout and subsequent verification with a suitable oscilloscope.
    2. Time aligned for SYNC_CLKs. What constitutes synchronized devices is a result of a synchronized  SYNC_CLKs. The Application Note – 1254 paper should be able to take you through SYNC_CLK synchronization procedure, which is intended to get all devices synchronized to the same REF_CLK edge.
    3. Coincident I/O Update. Synchronization of IO_Update to SYNC_CLK (just make sure SYNC_CLKS are already synchronized at this point) ensures that all devices are simultaneously triggered to load the latest programming information. In that case, the IO_UPDATE in your circuit should be suitable for providing a synchronized I_O update signal to both devices.

    This diagram might help you. 

    Seeing your application seems to be a different way. You want to skip the SYNC out/in pins in synchronizing which is really vital for this process to be successful. Is there a specific reason why? Because as of now, I can't think of ways if you want to skip that step. 

    All the best,

    Jules