I need a reference circuit for 4_wire the impedance measurement using AD5934, range 50 to 250 ohm.

You may use this post as a starting point:

4 wire Impedance measurement

In the link, it is mentioned that setting Rcal = 20 can set the impedance range from 1 to 60. Can you please explain this, I did not get this. How can Rcal resistor set the range. 

https://ez.analog.com/dds/f/q-a/28201/ad5933-4-electrode-configuration-for-human-body-thoracic-impedance-measurement-0-60-ohm

In the link, it is mentioned that setting Rcal = 20 can set the impedance range from 1 to 60. Can you please explain this, I did not get this. How can Rcal resistor set the range. 

https://ez.analog.com/dds/f/q-a/28201/ad5933-4-electrode-configuration-for-human-body-thoracic-impedance-measurement-0-60-ohm

For this part, I got the answer. 

"The accuracy achieved is very much dependent on how large the unknown impedance range is relative to the calibration resistor, RCAL. Therefore, in this example, the unknown impedance of 10.3 Ω measured 10.13 Ω, an approximate 2% error. Choosing an RCAL closer to the unknown impedance achieves a more accurate measurement; that is, the smaller the unknown impedance range is centered on RCAL is the more accurate the measurement. Consequently, for large unknown impedance ranges, it is possible to switch in various RCAL resistors to break up the unknown impedance range using external switches. The RON error of the switch is removed by calibration during the RCAL gain factor calculation. Using a switch to select various RFB values can optimize the dynamic range of the signal seen by the ADC.

Consequently, for large unknown impedance ranges, it is possible to switch in various RCAL resistors to break up the unknown impedance range using external switches. The RON error of the switch is removed by calibration during the RCAL gain factor calculation. Using a switch to select various RFB values can optimize the dynamic range of the signal seen by the ADC. In addition, note that to achieve a wider range of measurements a 200 mV p-p range was used. If the unknown Z is a small range, a larger output voltage range can be used to optimize the ADC dynamic range."

Reference link below, page 3.

https://www.analog.com/media/en/reference-design-documentation/reference-designs/CN0217.pdf

Abid said:

How can Rcal resistor set the range. 

Rcal does not set the range, it is used to measure the system gain, e.d. to find the dependence between the impedance under test and the output values produced in response. If you are planning to work with the circuit from the link you mentioned the factors setting the range are:
1. The excitation voltage programmed into the AD5933
2. Value of the current-setting resistor  Rlimit
3. Gain of the instrumentation amplifier INAMP
4. PGA gain programmed into the AD5933

Abid said:

Choosing an RCAL closer to the unknown impedance achieves a more accurate measurement

This statement is correct only in case when the measurement accuracy does not depend on the value being measured. This is hardly the case with the circuit from the link you mentioned - the lower the impedance of the "BODY" - the lower the sinewave signal coming to the AD5933's internal ADC and the smaller the portion of the ADC's available dynamic range utilized in digitizing the signal leading to fewer digital steps approximating the sinewave, e.d. the higher discretization error. By using low values of Rcal for low expected values of the "BODY" impedance this higher discretization error is experienced twice: at the calibration stage and at the measurement one, so both the gain calibration and the measurement are not accurate. Also, the error acquired in calibration at low Rcal expands, when such calibration is used to calculate the unknown impedance of value higher than Rcal.

A better approach would be to choose the Rcal value so that the internal ADC would receive the sinewave spanning the majority of the ADC's available dynamic range (which would be about Vdd - 0.2V). In this case the accuracy of the calibrated gain would be close to the maximum achievable with the AD5933. Same is true with the unknown impedance: to achieve maximum available accuracy the signal coming to the AD5933 should be as close to the Vdd - 0.2V as practical, but should not exceed it. Therefore, in practice, with the circuit from your link, Rcal should be equal to the maximum expected value from the range. AS the unknown impedance getting lower the measurement accuracy is going to  decrease, but one can either increase the excitation voltage, reduce the value of Rlimit, increase the gain of INAMP and/or program in PGA gain of 5 into the AD5933 or combination thereof, BUT making sure that the signal swing at the ADC input does not exceed Vdd - 0.2V. Exceeding it causes distortion of the sinewave, most often clipping at the power sully rails, the ADC mindlessly digitizes the distorted sinewave, which is fed to the "DFT," which does not know the sinewave is distorted and produces erroneous results without any warning to the user.

One more reiteration: the above is true for the 4-wire circuit from your link - it is the opposite when evaluation board or similar circuit is used. With the evaluation board Rcal should be equal the lowest impedance from the range to be measured.

Thanks for the detailed answer. The link was just a reference.

I am following this one, 

https://www.instructables.com/Bio-Impedance-Analysis-BIA-With-the-AD5933/

But I need couple of small change, 1) my impedance range is from 50-250 Ohm, and 2) VDD is 3.3V. What changes should I do. I should just focus on the gain, (gain should be in the range of the internal ADC)?

If I use different power source for my MCU, can I use this design.

If yes, what changes you suggest for achieving my impedance range. 

Thanks.

I also did simulation of the given design, does this design is fine or it needs any modification.

And the output waveform of U4 look like this.

Abid said:

gain should be in the range of the internal ADC)?

Yes, it is necessary to make sure that the circuit has gain that keeps the signal at the ADC input within 0.2V to Vdd - 0.2V for the entire expected range of the impedance to be measured. 

The circuit you posted has 3 different sources of power: +4.096V, +12V and -12V - not sure which "different power source" you are asking about. Is your MCU is powered by 5V instead of 3.3V you mentioned earlier? You can certainly power the AD5933 and additional circuits with the same 5V with the caveat that digital circuits tend to produce high-frequency spikes on on their power lines that can somewhat reduce the measurement accuracy. You can always use some linear regulator to get improved 3.3V from the 5V MCU power supply. Also, this circuit is not a 4-wire impedance measurement. 

R11 and R5 are connected in parallel to each other. If R5 seems to represent the impedance to be measured, then R11 has no function in this schematic and should be removed.

First thing to change would be to increase R3 to some reasonable value, say 1k for now, - it is the current-setting resistor for your impedance R5. When it is 0 - it instructs U2 to produce infinitely large current through R5, which requires infinite output voltage, which is impossible in practice, so U2 output slams into the power supply rails. When simulating, check that the output voltage of U2 is a well-formed sine wave of about 0.1V in amplitude

Second thing would be to remove R10 for now - the circuit does not need that much gain from INAMP. INAMP specs call for min 4.5V power supply voltage, so in your circuit at 3.3V Vdd it is operated out of spec. Perhaps it can still work, but will require some fiddling with the Input Common-Mode Voltage Range vs. Output Voltage, please see datasheet Fig 28, where it is specified for 5V Vdd. It is hard to predict how it is going to scale at 3.3V Vdd, maybe the model will be able to tell that. The desired behaviour would be for the OUTPUT VOLTAGE to have a baseline of Vdd/2 = 1.65V and to be able to swing from 0.2V to 3.1V undistorted. To achieve that it may be required to re-bias the U1 and U2 to lower voltage, perhaps somewhere down to 0.8V or lower to get into the INPUT COMMON-MODE VOLTAGE range, where there would be no signal distortion.

To summarize, lets increase R3 to 1k, remove R10 and run the simulation. U2 output should be a well-formed sine wave of 0.1V amplitude and DC bias of 1.65V. We would like to see the U4 output to be a well-formed sine wave of the same amplitude and bias, but likely it is not going to happen until U1 and U2 are rebiased to lower DC voltage - that would be the next step.

Please feel free to attach LT Spice models  to your posts via Insert->Image/Video/File (you might need to zip the file if the system refuses).

P.S. You might want to consider using INAMP with lower power supply voltage requirements, usually referred to as "single-supply" INAMPS such as INA331, MAX4462, AD8223, etc.

Thanks for your time and for the great explanation. 

I did some changes and I attached the Lt Spice file. Now, I am getting sinewave on the output. 

Please, check the file, and waiting for your suggestions.

Thanks once again.2477.50-250-range.asc