AD9854 Synchronization Questions

Question

In app note AN-605, it's recommended to use a flip-flop and a variable delay to generate the REFCLK and EXT I/O UPDATE CLK signals. Are there any parts that could be recommended to do this? I'm not sure what an appropriate part is to use for the flip-flop and what an appropriate variable delay might be. Any suggestions?

Jules.Nikko · Accepted Answer

Hi Evan, 
 
 Here are the list of available D flip-flops that are available on the Analog Website.

Part Number

Product Description

High Speed Logic Function

Data Rate (max)

Clock Input (max)

Output Fall Time (typ)

Output Rise Time (typ)

Vout p-p (typ)

Vout p-p (min)

Vout p-p (max)

Power (typ)

Vs (typ)

Package

bps

Hz

s p-p

V p-p

W

V

HMC853

28 Gbps D-Type Flip-Flop w/Programmable Output Voltage

Flip-Flops

28G

14p

15p

1.1

700m

1.3

240m

-3.3

16-Lead LCC (3mm x 3mm w/ EP)

HMC747

13 Gbps Fast Rise Time D-Type Flip-Flop with Programmable Output Voltage

Flip-Flops

14G

20p

22p

1.1

700m

1.3

264m

3.3

16-Lead LCC (3mm x 3mm w/ EP)

HMC723LC3C

13 Gbps Fast Rise Time D-Type Flip-Flop with Programmable Output Voltage

Flip-Flops

13G

17p

19p

700m

1.3

-3.3

16-Lead LCC (3mm x 3mm w/ EP)

HMC723LP3E

13 Gbps Fast Rise Time D-Type Flip-Flop with Programmable Output Voltage

Flip-Flops

13G

17p

19p

700m

1.3

-3.3

16-Lead QFN (3mm x 3mm w/ EP)

HMC727

13 Gbps Fast Rise Time D-Type Flip-Flop

Flip-Flops

14G

17p

19p

1.1

1.3

260m

-3.3

16-Lead LCC (3mm x 3mm w/ EP)

Depending on your desired parameters, this D flip flops should work well with AD9854. 
 
 As for time delay components, here are also list of qualified components that would work with AD9854.

Part Number

RF Primary Function

Data Rate (max)

Clock Input (max)

Rise Time (typ)

Deterministic Jitter

Power (typ)

Fall Time (typ)

Vs (typ)

Package

bps

Hz

s p-p

W

s p-p

V

HMC988

Clock Divider, Time Delays

4G

65

224.4m

65

3.3

16-Lead QFN (3mm x 3mm w/ EP)

HMC911

Time Delays

32G

24G

15p

6p

1600m

14p

3.3

24-Lead LCC

HMC877

Analog Control Phase Shifters, Time Delays

8G

23G

10p

627m

11p

3.3

16-Lead LCC (3mm x 3mm w/ EP)

HMC856

Time Delays

28G

20p

2p

610m

18p

-3.3

32-Lead LCC (5mm x 5mm w/ EP)

HMC910

Time Delays

32G

24G

14p

6p

1450m

14p

3.3

24-Lead LCC (4mm x 4mm w/ EP)

You used AN-605 as a reference. Synchronizing two AD9854 DDS Based-Synthesizers. Although there&rsquo;s also a similar application note which is also found in AN-587 . I would like to recommend AD9915 which is a newer part and use AN-1254 as reference for its synchronization. 
 I&rsquo;ve also gathered the differences between the two to see if using the AD9915 is doable. Here are some of the main things to consider:

Serial Timing Characteriestics

AD9854

AD9915

CS Setup Time

30 ns

49 ns

Period of Serial Data Clock

100 ns

4.9 ns

Serial Data Setup Time

30 ns

49 ns

Serial Data Clock Pulse Width High

40 ns

1.5 ns

Serial Data Clock Pulse Width Low

40 ns

5.1 ns

Serial Data Hold Time

0 ns

Data Valid Time

30 ns

78 ns

Absolute Maximum Ratings

AVDD & DVDD

2 V

AVDD & DVDD I/O

4 V

Vs

4 V

Digital Inputs

-0.7 - 4 V

Digital Output Current

5 mA

Upon checking, both of them have the same absolute maximum ratings and few differences with serial timing. The AD9915 uses advanced DDS technology, coupled with an internal high speed, high performance DAC to form a digitally programmable, complete high frequency synthesizer capable of generating a frequency agile analog output sinusoidal waveform at up to 1.0 GHz.)

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