I am using a designed PCB with 2 AD9910 DDS chips.
I'm experiencing some peculiar behaviour at the output, so I want to ask some questions.
I'm using a 1GHz sinusoidal clock.
1. Am I supposed to get a mirrored signal at the unfiltered output?
When I program it to act at 400MHz, I also get a 600MHz signal. Is this due to digital aliasing?
2. I'm currently using a 1.5:1 transformer to change the differential signal to a single output.
The differential side is impedance matched to be 100ohm, and the output is 50ohm by the PCB stackup.
Am I impedance matching the circuit correctly? And can this be the cause of any intermodulation?
3. I'm experiencing 2nd(200MHz=600-400) and 3rd order(Also 200MHz=400-(600-400), for a different reason) intermodulation between the intended (400MHz) signal and aliased (600MHz) signal.
Assuming the filter is passive (which it is), what can be the possible reasons for this nonlinearity?
4. Does clock power have any effect on the behaviour of the DDS output?