I am using the AD9910 evaluation board, I am giving 300 MHz ref clk externally, I am able to see sync_clk 300/8 MHz at sync_clk terminal. and also able to disable /enable divide by 2 bit in CFR3
Control Register, also able to enable/disable IO sync clk output pin. so my spi interface is also working fine. when I write 0xE register for single tone output, nothing is appearing in the output port.
I am keeping EPD grounded, and P0, P1, P2 also grounded to choose profile 0. Please guide me to resolve this issue.