Would like to check with you, for AD9914 EVM, is there a reason that IC pin 73 is left floated?
Is it supposed to be DVDD 1.8V?
From the evm inspection - the trace seem to be floated - Using regardlessly what's on the pad of the C301?
Could you help to double check- through gerber? Could it be the connectivity of that pin to 1.8V might be within the IC to other 1.8V pins.
Pin 57 is adjacent to the pin that is the control node to the VCO of the system clock PLL VCO. That node is very sensitive to noise injection (assuming the PLL is enabled). I suspect adding the bead improved the phase noise performance of the Evaluation Board when using the PLL.
The need for the bead is likely dependent on PCB layout (which is probably why there is not a specific note in the data sheet regarding pin 57). I suspect the bead is unnecessary in applications that bypass the internal PLL.