Currently, I am using LVPECL by entering the REFCLK input of the AD9953.
Can I change LVPECL to LVDS and use it?
The data sheet does not provide information regarding the properties of the REFCLK input signal.
Please tell me the detailed specifications of the AD9953's REFCLK input signal properties.
please answer about my question.
The REFCLK input (when NOT using a quartz resonator) consists of a differential pair with a bias network (see attached diagram). The bias network provides the necessary 1.35V DC voltage level to keep the differential pair active. Hence, then need for ac-coupling to GND of the unused input when driving the input single-ended.
The most important aspect of the REFCLK input is the internally generated 1.35V bias voltage. You must avoid disturbing the bias voltage when connecting an external driver. Generally, a dc blocking capacitor does the trick. Furthermore, the 1.35V bias means that there is no more than 450mV headroom for the input signal, which limits the peak amplitude supported by the REFCLK inputs.
The REFCLK input is not specific to any particular logic family. Whatever driver you use, make sure to limit the input voltage to <450mV pk-pk and use a dc blocking capacitor.
(sorry unable to embed image of diagram)