I understand that a DDS generates a sine wave. It seems logical that modulating the sine wave should follow easily.
I understand that a DDS generates a sine wave. It seems logical that modulating the sine wave should follow easily.
The AD9954 is capable of operating at sample rates as high as 400MHz implying a maximum Nyquist frequency of 200MHz, which is well above your 108MHz requirement. So, the AD9954 is certainly fast enough to cover the 88-108MHz frequency band.
The AD9954 also has an integrated PLL frequency multiplier that will allow you to scale up your 30.72MHz reference clock by a factor of 4 to 20 to provide a suitable system clock frequency. A minimum system clock rate of 270MHz would be suitable in your application. So a PLL multiplication factor of at least 9 is necessary yielding a 276.48MHz system clock, but your application will support a multiplication factor as high as 13 yielding a system clock of 399.36MHz.
The AD9954 has a 32-bit DDS, which allows you to program a carrier frequency anywhere from dc up to 50% of the system clock frequency with a tuning resolution of less than 1Hz. So you will have no problem covering the 88-108MHz band.
I can only guess at your 70kHz modulation frequency requirement. I assume that it is an IF frequency. That is, your baseband (music, voice, etc.) is first modulated onto a 70kHz subcarrier. Then, the 70kHz carrier (along with its modulated baseband signal) is modulated onto the final carrier frequency placing the signal in the 88-108MHz range. It is this second step for which the DDS is especially well suited.
I am not aware of a reference design for your application, but perhaps there are others on the forum who can help with that.
The AD9954 is capable of operating at sample rates as high as 400MHz implying a maximum Nyquist frequency of 200MHz, which is well above your 108MHz requirement. So, the AD9954 is certainly fast enough to cover the 88-108MHz frequency band.
The AD9954 also has an integrated PLL frequency multiplier that will allow you to scale up your 30.72MHz reference clock by a factor of 4 to 20 to provide a suitable system clock frequency. A minimum system clock rate of 270MHz would be suitable in your application. So a PLL multiplication factor of at least 9 is necessary yielding a 276.48MHz system clock, but your application will support a multiplication factor as high as 13 yielding a system clock of 399.36MHz.
The AD9954 has a 32-bit DDS, which allows you to program a carrier frequency anywhere from dc up to 50% of the system clock frequency with a tuning resolution of less than 1Hz. So you will have no problem covering the 88-108MHz band.
I can only guess at your 70kHz modulation frequency requirement. I assume that it is an IF frequency. That is, your baseband (music, voice, etc.) is first modulated onto a 70kHz subcarrier. Then, the 70kHz carrier (along with its modulated baseband signal) is modulated onto the final carrier frequency placing the signal in the 88-108MHz range. It is this second step for which the DDS is especially well suited.
I am not aware of a reference design for your application, but perhaps there are others on the forum who can help with that.