AD9957 RAM access failure

I am attempting to write and read the internal RAM in the AD9957.  It is not working.  Here is my procedure:

1.  Set RAM Enable = 0.

2.  Drive RT pin low, then high.

3.  Write to RAM Segment Register 0:  RAM Address Step Rate = 1; RAM End Address = 3; RAM Start Address = 0; RAM Playback Mode = 4

4.  Set RT pin low, then high.

5.  Write 4 values, one a time, to address 0x16.

6.  Set RT pin low, then high.

7.  Read back 4 values, one a time, from address 0x16.

The four values that I read back in step 7 are all identical.  They match the last value that I attempted to write in step 5.

What could cause this behavior?

Thanks,

John

  • 0
    •  Analog Employees 
    on Jan 21, 2011 8:52 PM

    Hi John,

    I'm not all that familiar with using the RAM on the AD9957 but I think I see your problem.  After writing to a reigster like the RAM segment registers you want to trigger an I/O Update instead of Ram Trigger or RT.  An I/O Update will transfer data from the temporary buffer registers to the actual registers used by the part.  RT on the other hand I think is only used for selecting the desired RAM Segment Register and/or triggering the RAM state machine to do something in playback mode.  The description for the RT pin might explain things a little bit further.

    RAM TRIGGER (RT) PIN
    The RAM state machine monitors the RT pin for logic state tran-sitions. Any state transition triggers the state machine into action.


    The direction of the logic state transition on the RT pin deter-mines which RAM segment register the state machine uses for playback instructions. RAM Segment Register 0 is used if the state machine detects a 0-to-1 transition; RAM Segment Register 1 is used if a 1-to-0 transition is detected.

  • 0
    •  Analog Employees 
    on Jan 21, 2011 8:59 PM

    I should have explained that without the I/O Update, the segment register is probably staying at it's default value which sounds like it probably has the start address equal to the end address.  Hence only one register value is being written and read back.

  • Hi Kevin,

    Thank you for your reply!  The AD9957 datasheet says that the RAM segment registers are effective without the need for an I/O Update, but I think you're right that there's some combintation of the I/O Update and RT that I'm getting wrong.  I've been experimenting with different combinations.  It's confusing to me when the I/O Update is needed and when the RT is needed, but I'm able to verify the RAM segment register is being written correctly by reading it back out.

    Thanks,

    John

  • 0
    •  Analog Employees 
    on Jan 21, 2011 9:35 PM

    Where did you read that an I/O Update isn't required?  I quickly scanned through datasheet to see if I was wrong and I actually read the opposite.  On page 27 it says "An I/O update (or a profile change) is necessary to enact a state change of the RAM enable or RAM playback destination bits, or any of the RAM segment register bits."

    To me, the distinction is that an I/O Update is mostly for transferring data from the temporary registers to the actual registers used by the part.  The RT is used mostly for selecting the correct Ram Segment to use.  The exception I think is when triggering a sweep in playback mode when either I/O Update or RT can be used.  For example, the top left of page 29 says "In ramp-up mode, upon assertion of an I/O update or a state change on the RT pin, the RAM begins playback operation using the parameters programmed into the selected RAM seg-ment register."

  • Hi Kevin,

    I'm looking at page 58 of Rev. B of the datasheet under the description of Ram Segment Register 0.  That's where I found it doesn't require an I/O update.  Interestingly, though, this statement is not made about RAM Segment Register 1.  I've tried it both with and without an I/O update, but the results are the same.

    Thanks,

    John