Hi,
Does anyone know is the maximum bitrate of FSK/PSK switching of AD9835 and similar DDS IC's?
Assuming max MCLK how often can I switch the FSEL/PSEL inputs?
I read from he datasheet that there is about 6 clock cycles pipeline delay on these inputs, but can I change the
state of these inputs faster than that to get the FSK/PSK modulation ?
Przemek
