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What is the maximum speed of FSK/PSK switching of AD9835 DDS?


Does anyone know is the maximum bitrate of FSK/PSK switching of AD9835 and similar DDS IC's?

Assuming max MCLK how often can I switch the FSEL/PSEL inputs?

I read from he datasheet that there is about 6 clock cycles pipeline delay on these inputs, but can I change the

state of these inputs faster than that to get the FSK/PSK modulation ?


  • Hi Przemek,

    The latency is 6 or  8/ 9 Mclk  cycles and yes, you can update faster the inputs.



  • How are you thinking of doing FSK/PSK?  Would you be doing it via the external pins FSELECT, PSEL0, and PSEL1 or via the internal registers or by writing new frequencies and phases as desired?  The latter two methods would be limited by how fast you can write to the AD9835 but if using the external pins you can technically change frequencies as fas as the MCLK.  In the pin descriptions on pages 7 & 8 it says "FSELECT is sampled on the rising MCLK edge" and "Like the FSELECT input, PSEL0 and PSEL1 are sampled on the rising MCLK edge."  However I doubt you'd want to change the frequencies that fast as you wouldn't get a full period of your programmed output frequency.

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