AD9958: No output

Hi stgtroman,

My speculation is that, there might be something wrong with the way the SPI was implemented in the program. Sometimes it's easy to overlook that there's been a transition of number of bits from FR1 to CFTW0. It's hard to say that there's something wrong with the circuit because you were able to successfully transfer data to the other two registers.

Regards,

Louijie

Roman,

I hope I am able to help.  I am very familiar with this product, although it has been many years.  I am also very familiar with Arduino.

It's very promising that you are able to communicate with the part. It's hard to say why CFTW0 isn't storing it's value correctly.  It would help me to see your Arduino code, I think.

Also, I'd like to better understand your schematic.  What are you using to generate your 3.3V and 1.8V supplies?  Do you have layout files, that I could get a better understanding of the hookup?  Also, which Arduino pins do you have connected to which pins on your schematic?

I look forward to learning more about your circuit, and I am hopeful that we'll be able to find a solution.

Regards,

Anne

Hello Anne,

I use the original SPI-library from Arduino. I have attached my source code. If I select both channels, CFTW0 is not written correctly. Otherwise if I select only one channel, it's correct. Nevertheless there is no output in both configurations.

For 1.8V and 3.3V supplies I used the adjustable voltage regulators LM317 and LM1117.

For communication I used pins 50 (MISO), 51 (MOSI), 52 (SCK) and 53 (SS). A15 is I/O_Update, 35 PWRDWNCTL, 36 DDS_RESET.

Regards,

Roman

Roman,

Thanks so much for the information.  Your code looks great, but it's hard to tell what's causing the CFTW0 not to be written. 

But, I'd also like you to check a few things for me first.  Since you're not getting ANY output, even when registers are being correctly written, I'd like to check a few things related to the DDS output.

Can you check the voltages at the DVDD and AVDD pins of the AD9958?  Also, please tell me what the RSET pin voltage is.  Since your SPI communication is (almost) working, I think it's safe to assume you have 3.3V at DVDD_I/O, but you could check that as well, to make sure it's what's you expect.

Also, can you please check to ensure that the CH0_OUT and CH1_OUT pins are measuring at ~1.8V, along with the center tap of the transformer.

Your Eagle files are very, very helpful.  But, I'm somewhat new to Eagle, and am not having much luck checking these connections in the layout file.

Thank you for the clear info you've given so far,

-Anne

Hello Anne,

thanks for your participation in this problem.

I measured DVDD and AVDD. All pins are at 1.78V.

On pin 17 (DAC_RSET) I measured 1.22V.

At all 3 points of both transformers I measured 1.78V.

I found some problems with 3.3V power supply. Something went wrong with the level shifter and so the voltage was at 3.6V, but this is within specifications.

Is it likely that this has destroyed the DDS?

Regards,

Roman

Hi

having 3.6V for 3.3V power rail usually does not destroy things, but that depends on the technology. If SPI interface is not dumb dead there is hope the IC is alive.

Have you tried to use PLL bypass mode? Maybe the PLL is not getting lock and that disables output?

Last week we did try out our micro modules with AD9912 and AD9952, and both of those IC started to work, pretty much as soon as we did compile and run our first test program, no tweaking required. Just working.

/Antti

Hello,

In read back mode, you must enable (using the channel enable bits in CSR) only the channel you're trying to read back. So, the other channel enable bits must be logic 0 in read back mode. That said, it sounds like it is working correctly if that is done, correct?

Note: In your schematic you have the PLL loop filter referenced to ground. It should be referenced to

1.8V. This may degrade ac performance. Also, I would recommned changing the 680 ohm resistor for the PLL

loop filter to 0 Ohms. We actually build the evaluation board with 0 ohms and 680pf, not 680 ohms.

The fact that you using the PLL and you have a SYNC_CLK running at 125MHz sounds like your code is OK.

Double check the output. I would isolate the transformer from the output and then check across the output 50 termination resistors to AVDD for a signal.

Hello,

the error in my schematics with the resistance and the capacitor on the loop filter pin follows from an error in the data sheet for the AD9958 evaluation board.

http://www.analog.com/static/imported-files/eval_boards/57241686299254AD995EB_0.pdf

There it is described incorrectly.

After correcting this error I have found an error in communication. In the first thread I've set FR1 to 0xD050A0. Unfortunately, I have disabled thus also the Ref Clock Curcuit.

Probably I have not tested the output, when FR1 was written correctly and I measured the 125MHz at SYNC_CLK.

Now all works correctly.

Thank you all for your help.

Regards,

Roman

Hi,

Glad I found this thread! I see the value of 0 Ohm for R9 on the evaluation board is correct in the BOM (Excel file), but how about updating the schematic as well? Many folks seem to use the evaluation board as the starting point for their own designs after all.

On a side note, I'd be curious to learn about the function of that zero-ohm resistor. What is it that makes this solution preferrable over a simple trace to the capacitor?

Regards,

Matthias

Hi Roman, Can you please share the final Schematics after all the corrections you made?

Thanks, Ilan.