I am using AD9957 chip. I want to use it for the 200 MSPS data rate.
I have applied 25 MHz of differential clock to as the REFCLK to the chip.
In the SPI Register Map, I have enabled the PLL and I have chosen the VCO Band.
But I am unable to find, where I am supposed to input the PLL Multiplier and Divider Values.
I think I will be needed to generate a 200 MHz of System Clock for the data rate of 200 MSPS. Is my assumption correct?
How can I set the required SYSCLK frequency using the REFCLK of 25 MHz and the Internal PLL?