Post Go back to editing

Questions about AD9957 configuration for QPSK generation

Hello, I am an RF and MW engineer trying to figure out how to configure AD9957 to obtain a 1 MHz bandwidth QPSK signal at fc = 70 MHz. My conclusions up to now are that I should use the following values:

Fsysclk = 176 MHz

R = 44

FTW = 1,708,225,629 (not exactly 70 MHz of output frequency, but near enough)

Is that correct?

I also have some doubts on how to generate a QPSK. I mean in that kind of modulation I transmit 2 bits per symbol, but I should provide 18 bits per path (I or Q) to AD9957 parallel data input. How do I translate my 2 bits to all those bits I should put at data input?

Probably all those questions are quite simple to someone who is used to work with baseband, but it is a bit out of my scope, so I would appreciate any clarification. It also would help any advice or reminder of important facts that I should keep in mind to generate my signals.

Thanks for your support!

  • The value you propose for the FTW is spot on. Be aware, however, that Fsysclk=176MHz necessitates an external 176MHz source. That is, you cannot use the internal PLL as its output frequency is limited by the VCO band selections. The lowest VCO band bottoms out near 350MHz.

    The R=44 value establishes the rate at which the device accepts 18b I/Q pairs at its parallel data port. In your specific case, the device takes in an I/Q pair every micro-second. Said another way, the "vector rate" is 1MHz. Of course, the actual clock rate at the input is twice the vector rate because I and Q are time interleaved (this was done to reduce the device pin count -- otherwise another 18 pins would have been necessary).

    Here's where it gets a little muddled...

    The vector rate and the symbol rate are usually not the same. In practice, one typically oversamples the individual symbols running the oversampled symbols through a transmit filter (e.g., raised cosine) and feeding the oversampled result to the AD9957. Hence, the vector rate is typically an integer multiple (the oversample factor) of the symbol rate. That said, if your symbol rate is 1MHz and you oversample the symbols by 4 (for example), then a 4MHz vector rate is necessary (i.e., R=11). The bandwidth at the output will be ~1MHz (the actual BW depends on the specifics of the baseband filtering).

    You may find ADI application note AN-922 helpful on this subject. It describes the process of baseband filtering and the appendix describes symbol encoding for 16-QAM. The idea is the same for QPSK (which is essentially 4-QAM). Table 1 in the appendix gives I & Q values in terms of the peak value of the symbol pulses. You can build a similar table for QPSK (it will only have 4 rows instead of 16). In the end, you will need to scale the I & Q values (whether or not you go through the filtering exercise) so that they span an 18b range prior to sending them to the AD9957.

    Hopefully, you're now on your way to QPSK.

  • Hi Kenny, thanks for your support. I read AN-922, and I have the concepts much clearer now, but a new doubt arise regarding pulse shaping of symbols. I want to generate a 1Mbps QPSK with rooted raised cosine with roll off factor of 0.3, but it is not very clear for me how to do that. Initially I guessed that pulse shapping was done by the digital filter inside AD9957 after input data assembler, but I have read on page 23 of datasheet that "encoding and pulse shaping of symbols must be implemented before data is presented to the input of the AD9957". Does this mean that if I want my QPSK with rooted raised cosine with roll off factor of 0.3, I must implement that filter in the FPGA that will supply data to AD9957? In that case, all the 18 symbols at the I/Q data input should be filtered, shouldn´t they?

    I am a bit confused about that, as for me it has more sense to do pulse shaping after data assembler, but in that case I don´t know how to configure programmable filter to obtain the root raised cosine with roll off of 0.3 that I want.

    I want to apologize for my lack of knowledge about this issues, and I would appreciate any clarification that helps me to finally understand the behavour of AD9957.

    Thanks in advance.

  • Yes, you are correct in that any baseband pulse shaping must be done external to the AD9957 using an FPGA, DSP, uP, etc.

    The sole purpose of the baseband filters inside the AD9957 is Nyquist image rejection. Recall the vector rate at the input (the rate of I/Q pairs) is less than the device's DAC sample rate (the system clock). The process of translating the spectral content of the input (sampled at the vector rate) to the output (sampled at the system clock rate) requires special filtering to remove images produced by the sample rate conversion. An article (link to article) about the AD9857 (the predecessor to the AD9957), may help with the concept of sample rate conversion.

    Just to be clear, the 18 inputs to the AD9957 are not "symbols". The 18 pins constitute an 18b data bus. For example, if the 18b are encoded as twos complement, then you can think of the 18 bits as representing a numeric range of -131,072 to +131,071. For example, suppose you want to send a quadrature sinusoid as the baseband signal instead of QAM symbols. This means the I and Q inputs are represented by:

    I(n) = 131071*cos(2*pi*f*n*t)     <== round I(n) to an integer

    Q(n) = 131071*sin(2*pi*f*n*t)     <== round Q(n) to an integer

    Where n is the sample number (0, 1, 2, 3, ...), I(n) and Q(n) are the n-th I and Q samples, t is the period of the "vector rate" and f is the frequency of the sinusoid. That is, for a vector rate of 1MHz, t=1us. So, f=250,000 will produce a 250kHz sinusoid (sampled at 1MHz). Hence, I and Q are a "time series" of 18b words, each representing an instantaneous magnitude in the time domain. In fact, the I & Q inputs ALWAYS constitute a time series of 18b words representing an instantaneous magnitude in the time domain.

    "Symbols" are represented as rectangular pulses in the time domain. For QPSK, the pulses have two levels (0 and 1). For 16-QAM and up, the pulses have more than two levels (as shown in the appendix of AN-922).

    Now, let's focus on your application:  QPSK with a 1MHz symbol rate. However, let's forget about pulse shaping for the moment. For QPSK a symbol can be a 0 or a 1. You can think of a "0" symbol as a minimum input magnitude to the AD9957, or -131,071. Likewise, a "1" symbol is a maximum input magnitude, or +131,071. So, your symbol transmission (I or Q), would consist of two possible values (-131,071 or +131,071). These symbols would be applied to the AD9957 at the vector rate (actually, twice the vector rate, because we need to get BOTH an I and a Q word into the device in one vector period).

    Now to pulse shaping...

    Pulse shaping requires oversampling of the rectangular pulse associated with a particular symbol. Let's arbitrarily choose an oversampling factor of 4. That is, we'll break each symbol pulse into 4 equal sub-intervals. This gives us 4 samples all having the same magnitude (i.e., the magnitude of the symbol pulse in question). The pulse shaping filter (which operates at the vector rate) takes these 4 samples and transforms them into 4 smoothed out samples corresponding to the desired pulse shaping response (raised cosine, root raised cosine, etc.). The pulse shaping filter does this continuously. That is, as the symbol pulse samples stream into the input, the filter continuously streams out smoothed output samples.


    These smoothed samples are "magnitudes", and it is these values that get scaled to the 18b range of the AD9957 input (i.e., the samples are scaled to the range -131,071 to +131,071).

    That is, for the example above, each symbol at the input to the AD9957 consists of a time sequence of four 18b I-samples and four 18b Q-samples as delivered by the external pulse shaping filter.

    I hope this is helpful.

  • As a follow up, the AD9853 would have come very close to fitting your application. It was able to take in QPSK symbols directly as bit pairs (00, 01, 10, or 11), apply the necessary pulse shaping, and perform the requisite sample rate conversion!

    Unfortunately, the AD9853 is no longer in production. Besides, it was just a little too slow with a 65MHz max. carrier frequency and 165MHz max. system clock.

  • I think now I get it, thank you vey much for your pattience and support.