Hey,all
I got a problem when I use ADF4351 as the refclk@3G, Let the output at 1.12G, wen power on, always have unexpected spurious, and the noise floor got up, I try to change the dvdd(1.8v) to 1.72v or 1.68v, yes, this can work, but I don't know why, and for two or three ad9914, the Dvdd has to change different value. so , I want to get help from you, how can I do?
消息编辑者为：qiuqiu
I'm asking someone to try to take a look in the lab, see if we can duplicate; I can't right now. The latest details you provided may make your question about an alternative regulator largely irrelevant…
thanks for your answer, I have solved the problem already, the point is when the clk is already provided stability, set the DAC CAL enable bit, then clear.(as the datasheet said),which can recalibrate…
yeah, you are right, the diferentiall CLK input should be 100ohm, not 50 ohm， I have changed it during my test. Good luck to you, I have changed a lot of AD9914s during my test, and I thought that maybe…
