For the 6 to 8 MHz
chirp needed for the receiver, we need to load a new frequency value every
sample. This can be done by loading a
new value into each of the two frequency registers every 2 samples and
switching the mux at the sysclock rate.
This should be possible for the mux, not sure about loading the
frequency registers that fast as it seems you need to load an address followed
by a data value each time – i.e. you need to lead addr1 data1 addr2 data2 at
the sysclock rate. The processor would
have to load a new value at the 30 MHz rate or every 33 nsec.
The question is can the frequency registers be programmed
with a new value at half the system rate which is 30MHz?