AD5933 Clock Scaling with AD9834

There are several issues with this approach:

1. Driving digital input MCLK of the AD5933 with a sine wave is not a good practice

2. With R1 at 200 Ohms the MCLK voltage is 0.6V max - too low to be reliable for driving digital circuits (also see #1)

3. Using expensive full-blown AD9834 DDS to drive MCLK of another DDS seems to be quite an overkill

You might consider looking at digital programmable clocks that cost less and are likely to work better than the AD9834 in this circuit.

Hallo Snorlax,

thank you for your help. 

Snorlax schrieb:

There are several issues with this approach:

1. Driving digital input MCLK of the AD5933 with a sine wave is not a good practice

2. With R1 at 200 Ohms the MCLK voltage is 0.6V max - too low to be reliable for driving digital circuits (also see #1)

3. Using expensive full-blown AD9834 DDS to drive MCLK of another DDS seems to be quite an overkill

 

You might consider looking at digital programmable clocks that cost less and are likely to work better than the AD9834 in this circuit.

1. Now it makes sense for me. 
2. V_IH = 2V, V_IL = 0.8V are the valid TTL-values i found in the datasheet.
3. Can you recommend a digital programmable clock which is easy to handle and I2C programmable? I´d like to scale the frequency at MCLK-Pin at AD5933 to get accurate results at lower frequency measurements. 

Thank you very much for your help. 

2. AD9834 output IOUT acts as a current source with typical maximum scale of 3 mA. With R1 at 200 Ohms the maximum voltage that this current source can generate is 3 mA * 200 Ohms = 0.6 V, which is lower than V_IL of 0.8V.

3. It is difficult to recommend anything not knowing what it is you are trying to achieve. One example could be this programmable oscillator. If you need even lower frequency on the low end if its range - you can add some fixed divider, say a 4-bit counter, to further divide its output by 16. I am sure somebody from ADI can give you some better pointers.

Thank you for your help.

In Data Sheet AD9834 on page 8, you can see that you can use the VIN Port to use the internal comparator. then it´s possible to generate square waves... But I don´t know how to do that. Does anybody have some experience with that?

You certainly can use the internal comparator. It will require quite a few external components for filtering and some effort to ensure clean meander at the comparator output. Here is a reference.

Hi All,

Just to clarify few things,

1- The AD9834 can be used to generate a square waveform... being said that, the main benefit of the DDS vs standard clock is the ability to keep the phase constant when the frequency is updated.

I don't think this add any value to your system AND in the particular case of the AD9834 the phase noise may be worst than other approaches.

2- You may use a DPLL in your application.

3- You didn't mentioned your frequency range OR why do you require a variable clock...

Regards,

Miguel

Hi,

Im not an expert on this topic... I believe in the PLL section they should be able to help you.

Best Regards,

Miguel

musach schrieb:

Hi All,

 

Just to clarify few things,

1- The AD9834 can be used to generate a square waveform... being said that, the main benefit of the DDS vs standard clock is the ability to keep the phase constant when the frequency is updated.

 

I don't think this add any value to your system AND in the particular case of the AD9834 the phase noise may be worst than other approaches.

2- You may use a DPLL in your application.

 

3- You didn't mentioned your frequency range OR why do you require a variable clock...

 

Regards,

Miguel

Hi Miguel,

thx for your help! 

I´d like to change MCLK-frequencies to be able to measure lower frequencies with AD5933. 

The following table is a part of manual UG-364. I need frequencies down to 25 kHz at MCLK-Pin of AD5933. 

Is there an IC available with a DPLL inside and I2C programmable? Or should I design it?

Thx for your help.

Hi,

One of the easiest and cheapest solution is using ADF4360-9 to generate mid-frequency (order of 100MHz) signal and using a programmable divider such as the N-divider of ADF4002 to divide this signal to kHz range.

The N-divider of ADF4002 is 13-bit which gives a divide ratio of 8191 max. The above example diagram enables generating all frequencies except 16MHz in the Table-2 that you have shared. All frequencies including 16MHz can be generated by using 96MHz output from ADF4360-9. Note that both parts are integer based.

Kazim

Thank you for your help.

I hope it is not too difficult to connect both parts to AD5933. I´m going to read the manuals.