I trying to synchronzie 4 DDS of AD9910 ,but i am not yet there, i aligned the REFCLK of all of them
also the Sync out of the Master is connected to all the slaves by ADCLK846, I have made the SMP_ERR
Latch error bit go to 0 v. and for a minute every thing was aligned also at the Signal output, but when i changed
frequency it didn't save the alignement. I0_Updated is triggered to all the DDS's at once every update, even when one DDS recives information to the register all of the DDS'S get IO_UPDATE. but still at every frequency different phase between the signals and also sometimes one frequency that was aligned after changing the frequency and going back to it ,changes the phase alignment a little.
is someone familiar with this sequence
Thank You in advane
It seems the Receive delay start responding only when the MSB are high,
secondly,the preset don't affect the sync clock 'I tried to change it
I have aligned the Sync_clock of both of the DDS and i think now they are syncronized ,when i power up the system i inititated the control registers and apply IO_UPDATE. but in order to get the synchronzied output signal , i first initiate the profile of each DDS and than apply a Coincident IO_UPADTE and they are synchornized. but if i apply for each of them a IO_UPDATE and then apply a Coincident IO_UPDATE, there is a phase mismatch and it seems the misaligment is maintained also i keep applying a Coincident IO_UPDATE. the same happens when they are synchronized and i change one of the DDS frequency and change it back ,the phase alignment is not maintained. i have tried to apply reset the phase accumulator but i didn't see any affect.
what do you think about this issue ?
Meir - I'll try to address each of your described situations:
"if i apply for each of them a IO_UPDATE and then apply a Coincident IO_UPDATE, there is a phase mismatch and it seems the misaligment is maintained also i keep applying a Coincident IO_UPDATE"
This sounds like the behavior I would expect because the DDS switches in a phase continuous manner. If you have a phase mismatch between two channels at the same frequency, then issue concurrent IO UPDATES to both devices, where they both switch to (or stay on) the same frequency, I would expect them to maintain that phase difference. Using the autoclear phase accumulator (or the clear phase accumulator) function should eliminate that phase difference after an IO UPDATE.
"same happens when they are synchronized and i change one of the DDS frequency and change it back ,the phase alignment is not maintained."
If you change the frequency of just one of the two devices, then change it back, it is to be expected that when you change back the two will not be at the same phase, again because the device changes in a phase continuous manner. Once again, using the autoclear phase accumulator (or the clear phase accumulator) function should eliminate that phase difference after an IO UPDATE. I am guessing from this statement that you would like a device which support phase coherent switching. We only have one device currently available which offers any level of phase coherent switching capability inherently, that's the AD9164.
"i have tried to apply reset the phase accumulator but i didn't see any affect."
I do not understand how this could happen if the programming of the clear phase accumulator is done correctly.
Thank you very much for the Nice Precise and Quick respond, I have a found why did the accumulator didn't respond ,it was an IO_RESET which were missing in the initialization, i guess it is because I don't configure all the registers it needs this kind of reset.
The question which arise from what you wrote above is ,now when I change the frequency at one of the channels DDS and came back , and at this time the accumulator was reset .after this clear of the accumulator (with IO-UPDATE) is this process is phase coherent between those signals?, because actually I have a constant phase again as before the freq change.
and is this clear accumulator is a phase jump?
I have synchronized all the 4 DD's,and i am also using the Clear Accum, but it seem that sometimes for each 5 to 6 IO updates the aligned phase is lost and is back after the next IO_UPDAE, also happens when all the profile are changing at once,some times they are not aligned in phase and it goes back to be aligned on the next change of all profiles
what can be the reason for that