AD9910 Chip Synchronization problem

Hello

I trying to synchronzie 4 DDS of AD9910 ,but i am not yet there, i aligned the REFCLK of all of them

also the Sync out of the Master is connected to all the slaves by ADCLK846, I have made the SMP_ERR

Latch error bit go to 0 v. and for a minute every thing was aligned also at the Signal output, but when i changed 

frequency it didn't save the alignement. I0_Updated is triggered to all the DDS's at once every update, even when one DDS recives information to the register all of the DDS'S get IO_UPDATE. but still at every frequency different phase between the signals and also sometimes one frequency that was aligned after changing the frequency and going back to it ,changes the phase alignment a little.

is someone familiar with this sequence

Thank You in advane

Mier

Parents
  • Hello JLKeip

     

    I have synchronized all the 4 DD's,and i am also using the Clear Accum, but it seem that sometimes for each 5 to 6 IO updates the aligned phase is lost and is back after the next IO_UPDAE, also happens when all the profile are changing at once,some times they are not aligned in phase and it goes back to be aligned on the next change of all profiles

    what can be the reason for that

    ?

    Thank You

    Meir

Reply
  • Hello JLKeip

     

    I have synchronized all the 4 DD's,and i am also using the Clear Accum, but it seem that sometimes for each 5 to 6 IO updates the aligned phase is lost and is back after the next IO_UPDAE, also happens when all the profile are changing at once,some times they are not aligned in phase and it goes back to be aligned on the next change of all profiles

    what can be the reason for that

    ?

    Thank You

    Meir

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