I have a question about PDCLK and SYSCLK/4N.
When using PS0 and PS1 to change profile, will the PDCLK and SYSCLK/4N be reset or keep the status as before?
Changing the PS1:0 pins functions exactly like programming registers and asserting IO_UPDATE. The only difference is that you preload the "profile" registers, which only become active when you change the state of the PS1:0 pins. In fact, a state change on the PS1:0 pins is a substitute for asserting IO_UPDATE.
As long as the profiles have the same CIC interpolation factor, the relationship between PDCLK and SYSCLK/4N should remain intact.